5d1a0a14bf
ad9625x2_fmc: dma fifo changes
2014-11-14 16:00:32 -05:00
41ffc66c26
fifo2s: removed m interface
2014-11-13 15:00:03 -05:00
2eb80715e3
ad9625_fmc: dma fifo changes
2014-11-13 14:13:00 -05:00
eaacd4d49a
adi_project.tcl: Fix message severity (working solution)
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Need to define the default/initial severity too.
2014-11-13 18:55:43 +02:00
4bcf338e9b
adi_project.tcl : Fix message severity
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When message severity is set to 'error', need to do it quiet, other way the tool will stop after synthesis, complaining for previous errors.
2014-11-13 16:33:47 +02:00
5baa015246
kc705_base: Delete timing constraints
2014-11-13 16:30:37 +02:00
3915f7d5f4
daq2: kcu105 dma-fifo changes
2014-11-12 15:25:13 -05:00
d79e95b774
daq2: dma-fifo changes
2014-11-12 15:24:54 -05:00
074662a622
dmafifo: common interface with fifo2s
2014-11-12 15:24:31 -05:00
8761db438e
axi_fifo2f: common interface with fifo2s
2014-11-12 15:15:32 -05:00
855919ee8e
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:50 -05:00
dbf5acde76
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:49 -05:00
c6af2696b3
plddr3: internal buswidth/clock conversion
2014-11-12 14:43:48 -05:00
925e966eb6
axi_fifo2s: fifo full replaced with ready
2014-11-12 14:43:47 -05:00
5fc4f1b000
axi_fifo2s: buswidth fix
2014-11-12 14:43:46 -05:00
d204a7c2b7
axi_fifo2s: include bus width/clock transfer
2014-11-12 14:43:44 -05:00
e7cec7171e
axi_fifo2s: include bus width/clock transfer
2014-11-12 14:43:43 -05:00
4381f20a6a
axi_fifo2s: include bus width/clock transfer
2014-11-12 14:43:42 -05:00
9f2dbad539
axi_fifo2s: include bus width/clock transfer
2014-11-12 14:43:41 -05:00
e683b5868e
axi_fifo2s: include bus width/clock transfer
2014-11-12 14:43:40 -05:00
81b4cd532d
axi_fifo2s: include bus width/clock transfer
2014-11-12 14:43:38 -05:00
888ab888d2
axi_fifo2s: include bus width/clock transfer
2014-11-12 14:43:37 -05:00
f8e7796592
axi_jesd_gt: Fix lane number parameters
2014-11-12 17:43:32 +02:00
bf62665c56
prcfg_qpsk: Add Simulink model
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Matlab version used: R2014a, HDL Coder 3.3
2014-11-12 15:44:38 +02:00
ce92d49565
adv7511: Updated VC707 project to include linear flash
2014-11-12 11:46:01 +02:00
897f5e219d
ad9625_zc706: Update GT configuration
2014-11-11 19:25:30 +02:00
776a396141
adi_project.tcl: Add new message severity definition
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Set "Parameter does not exist!" message severity to error.
2014-11-11 19:20:40 +02:00
8147fa0eb6
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:27 -05:00
439cbecf7c
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:26 -05:00
b96a8d01c3
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:25 -05:00
64ec633438
gt: asymmetric no of lanes
2014-11-11 08:54:24 -05:00
97fa063341
fmcadc3: Fix pre-processing of ADC data
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Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-11 11:49:40 +01:00
4ccece5c8d
fmcadc3: Add a chip-select decoder to support up to 7 devices
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This is required for the fmcadc3 board as it features 7 chips all
connected to the same SPI bus (ad9528, ad9234 x2, ada4961 x4).
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-11 11:49:40 +01:00
05ed98f884
common: Updated common constratins for ac701, kc705, vc707, zc702
2014-11-11 12:35:44 +02:00
c1268f089d
scripts: hp/mem updates
2014-11-10 15:06:20 -05:00
3211964c2e
ad6676evb: added
2014-11-10 13:41:01 -05:00
cb15567a56
ad6676: added
2014-11-10 13:36:07 -05:00
4c0d053055
fmcomms7: compilation fixes
2014-11-10 13:26:28 -05:00
b85c552e43
fmcomms7: constraint updates
2014-11-10 13:26:27 -05:00
87000d7a23
fmcomms7: board updates
2014-11-10 13:26:26 -05:00
82048866dd
fmcomms7: initial updates
2014-11-10 13:26:25 -05:00
c72a04cecf
fmcomms7: initial updates
2014-11-10 13:26:24 -05:00
4d915d539f
fmcomms7: initial updates
2014-11-10 13:26:23 -05:00
0560bd5f99
fmcomms7: initial updates
2014-11-10 13:26:21 -05:00
cbcdf4a2aa
fmcomms7: initial updates
2014-11-10 13:26:20 -05:00
1edef2b8ff
fmcomms7: initial updates
2014-11-10 13:26:19 -05:00
12896c7624
fmcomms7: daq2 copy
2014-11-10 13:26:18 -05:00
50ce2e30be
daq2: ila changes for kcu105 timing
2014-11-10 10:57:35 -05:00
1d73adcbc4
fmcadc3: zc706: Allow to enable pairs of channels and sign-extend data
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Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-07 18:09:00 +01:00
c33d3dd0af
fmcadc3: zc706: Connect DMA interrupt line
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Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-07 18:08:24 +01:00
Rejeesh Kutty
Istvan Csomortani
Adrian Costina
Paul Cercueil