3041e77659
ad40xx/zed: Update constraints
2021-02-04 11:04:32 +02:00
b989ba36d1
axi_spi_engine: Fix util_axis_fifo instance related issues
2021-01-08 12:29:26 +02:00
40772a8b2c
ad40xx_fmc/zed: Fix constraints, to avoid critical warnings in synthesis
2020-09-15 13:08:39 +03:00
fa259c7975
ad40xx: Fix a typo
2020-01-10 10:20:06 +02:00
9497b1cace
ad40xx: Remove redundant upscaler IP, Add timing constraints
2020-01-09 11:32:31 +02:00
cf9d0814d5
ad40xx/zed: Place all the SPI registers near IOB
2019-06-28 11:18:29 +03:00
10e1abc22f
ad40xx_fmc/zed: Delete IOB TRUE constraints
...
Vivado can not apply the IOB TRUE constraint to only one bit of a
registers. So these constraints will generate several CRITICAL WARNING.
Taking into consideration the maximum used frequencies and current
architecture these constraints are not critical.
2019-06-28 11:18:29 +03:00
9ab88f1200
ad40xx: Initial commit
2019-06-28 11:18:29 +03:00
Istvan Csomortani
Stanca Pop