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21 Commits (27bb69b44c02ccf907bdc83749845cf11fe87940)

Author SHA1 Message Date
Iulia Moldovan 28c06d505f Add/edit copyright and license for .v, .sv files 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-07-11 15:17:41 +03:00
LIacob106 830b5aecb6 projects: 9009: system_project.tcl: List configs as comments 
Add a list with make commands with the proper parameters for each devicetree
availible at the moment.

Signed-off-by: LIacob106 <liviu.iacob@analog.com>
 2023-05-12 14:17:05 +03:00
Iulia Moldovan db94628cc6 library & projects: Update Makefiles 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-01-27 11:54:05 +02:00
Bogdan Luncan 72313df81f Updated the makefiles to build the projects in subdirectories based on the build parameters. 
Running 'make' will build the default project directly in the project folder (like it did before)
Running 'make RX_LANE_RATE=15 TX_LANE_RATE=15' will build the project inside the 'RXRATE15_TXRATE15' subdirectory.
Running 'make CFG=cfg/test_config.txt" will use the variables found inside the configuration file and build the project inside the 'test_config' subdirectory.
Running 'make clean' will clean the default project only.
Running 'make CFG=cfg/test_config.txt clean' will clean the 'testconfig' build.
Running 'make clean-all' will delete all the built configurations and libraries.

Note that the 'JESD' and 'LANE' words from the parameter names are stripped.

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
 2022-11-14 09:38:42 +02:00
Liviu.Iacob 6a583a8ace projects/fmcomms8: Expose jesd params, add support for TX_JESD_L=4 2022-10-03 10:27:15 +03:00
Iacob_Liviu 482f0489a3 scripts: Merge adi_env.tcl into a single file 
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
 2022-08-08 13:52:54 +03:00
Iulia Moldovan 961ebe0cc2 projects: Update .v files according to guideline 
Deleted lines after endmodule and consecutive empty lines.
Modified parentheses, extra spaces.
Fixed indentation.
Fixed parameters list to be each parameter on its line.

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
 2022-06-28 18:06:56 +03:00
PopPaul2021 c71e5de928
zcu102: ad_fmclidar1_ebz, fmcomms5, fmcomms8 (#811) 
adrv2crr_fmc: adrv9009zu11eg
adrv2crr_xmicrowave: adrv9009zu11eg

The IBUFGDS primitive is deprecated in UltraScale devices.
 2021-11-22 08:09:46 +02:00
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Sergiu Arpadi 6f2f2b8626 makefile: Regenerate make files 2021-01-20 01:02:56 +02:00
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a 
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
 2021-01-20 01:02:56 +02:00
aholtzma 2ff5420630 Update system_top.v 
Add a comment that the spi CS decoding is tied to a setting in the device tree.
 2020-11-02 16:59:08 +02:00
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific 
Updated all system_project and Makefiles
 2020-11-02 16:13:35 +02:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Adrian Costina bde2d1d66d fmcomms8: zcu102: Leave the SPI constraint at 25 MHz 2020-09-25 11:54:12 +03:00
Adrian Costina f8c2eb12d4 fmcomms8: zcu102: Remove the test pins, as they are not connected 2020-09-25 11:54:12 +03:00
Istvan Csomortani 32eeedb660 makefile: Update makefiles 2020-05-07 08:41:49 +01:00
Adrian Costina 19b7986486 fmcomms8: Fix SPI timing 
The maximum SPI rate set to 10MHz
 2020-03-16 13:26:20 +02:00
Adrian Costina fad52175d1 fmcomms8: Fix spi connection 2020-03-06 16:07:02 +02:00
Adrian Costina e51d9372cd fmcomms8: ZCU102: Added DAC FIFO 2020-02-10 11:23:52 +02:00
Adrian Costina 016a1d540d fmcomms8: ZCU102: Initial commit 2020-02-10 11:23:52 +02:00