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6 Commits (28ace647d10f24ba0c32594a37d0a64e19e1c04a)

Author SHA1 Message Date
Iulia Moldovan 0c0617d49e libraries: Update modules according to guideline 
* Added header license for the files that didn't have
* Modified parentheses
* Removed extra spaces at the end of lines
* Fixed parameters list to be each parameter on its line
* Deleted lines after endmodule and consecutive empty lines
* Fixed indentation

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
 2022-06-28 18:06:56 +03:00
Iacob_Liviu 30b491fff7 tb: jesd204: update and automate frame_align_tb 
Fix jesd204 frame_aligh_tb by adding a fifo to solve rx and tx delay.
It saves the data from tx and compares it with the recieved ones from
rx.
 2021-07-12 10:30:49 +01:00
Laszlo Nagy 94181206c2 jesd204/tb: Update testbenches 2021-02-05 15:24:15 +02:00
Matt Blanton 400c3927f7 jesd204: Add support for 8-byte JESD204B, frame alignment character insertion/replacement 
Add support to JESD204 RX and TX core for 8-byte 8b/10b link mode,
and frame alignment character replace/insert with or without scrambling.
Add support for xcelium simulator to jesd204/tb
Increased cores minor version.
 2021-02-05 15:24:15 +02:00
Laszlo Nagy 15e14c76b9 jesd204_rx: Don't auto reset on frame alignment error by default 
Let software handle the error case by default. Other steps might be
required to bring-up properly the link if one shot SYSREF is used.
 2020-07-31 11:43:41 +03:00
Matt Blanton 1e04b2e2f2 jesd204_rx: Add RX frame alignment character check 
Add support for RX frame alignment character checking when scrambling is enabled and
for link reset on misalignment.
Add support for xcelium simulator to jesd204/tb
 2020-07-31 11:43:41 +03:00