Lars-Peter Clausen
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17d3e3c64b
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daq2: daq2_qsys.tcl: Convert to ADI JESD204
Convert the DAQ2 project for Intel/Altera platforms to the ADI JESD204
framework.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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2017-08-21 11:21:42 +02:00 |
Rejeesh Kutty
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3f92381bd0
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daq2/a10gx- project/constraint updates
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2017-06-06 16:09:15 -04:00 |
AndreiGrozav
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b78e9d8c27
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daq2_a10gx: Set XCVR Tx/RX clk/data voltage levels at 1V
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2017-03-01 11:32:17 +02:00 |
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Rejeesh Kutty
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5df30ac6b0
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daq2/a10gx- xcvr sharing
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2016-09-12 14:57:50 -04:00 |
Istvan Csomortani
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f784557895
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lib_refactoring: IOBUF is a Xilinx macro, no need to use with Altera
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2016-08-08 15:06:34 +03:00 |
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Rejeesh Kutty
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ae1dd1d58e
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daq2/a10gx- qsys updates
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2016-06-07 12:28:04 -04:00 |
Adrian Costina
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ea57b3c03c
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daq2: A10GX, add project specific IP search paths
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2015-11-25 10:58:36 +02:00 |
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Adrian Costina
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a81625e1fa
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daq2: Updated a10gx project
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2015-11-24 13:28:53 +02:00 |
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Rejeesh Kutty
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827fc1e29a
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remove auto-pack disable
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2015-08-20 13:54:16 -04:00 |
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Rejeesh Kutty
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0e587dd955
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daq2/a10gx-- ad-rst unpack
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2015-08-19 13:26:38 -04:00 |
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Rejeesh Kutty
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b3102b5095
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daq2/a10gx-- xcvr+base changes
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2015-07-21 11:01:45 -04:00 |
|
Rejeesh Kutty
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4b8d764852
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daq2- base system modifications
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2015-07-20 09:31:44 -04:00 |
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Rejeesh Kutty
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a2e7fb9491
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daq2/a10gx: qsys signal tap version
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2015-07-13 10:07:18 -04:00 |
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Rejeesh Kutty
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8c0d74aa90
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transceiver split up outside qsys
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2015-07-10 11:44:42 -04:00 |
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Rejeesh Kutty
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f1dd2435b4
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signal tap removed
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2015-07-08 15:47:31 -04:00 |
|
Rejeesh Kutty
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6bc24e25eb
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stap- need to be qsys
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2015-06-29 13:26:32 -04:00 |
|
Rejeesh Kutty
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67df6b3ea8
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a10gx- disable lab cell on dsp input register
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2015-06-19 14:32:54 -04:00 |
|
Rejeesh Kutty
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4a701d3895
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a10gx- no-ddr
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2015-06-01 11:00:02 -04:00 |
|
Rejeesh Kutty
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ad3198f623
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a10gx: top level fixes
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2015-05-21 14:06:15 -04:00 |
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Rejeesh Kutty
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dc0eea5f0f
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a10gx: updates--
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2015-05-11 11:56:26 -04:00 |
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Rejeesh Kutty
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75e055dab9
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daq2/a10gx- initial commit
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2015-05-11 11:56:23 -04:00 |