Commit Graph

862 Commits (2a2e3366e70ba553dd752441afd77f8ea0505ecd)

Author SHA1 Message Date
Michael Hennerich bb6cc40902 projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich 8e4d0a1b60 projects/common: KCU105 VC707 KC705 sync microblaze core defaults
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Adrian Costina 4c05e8de5d motor_control: Updated project to Vivado 14.2. Temporary removed XADC
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:48:00 +02:00
Adrian Costina ea1a50c985 axi_mc_speed: updated core to latest axi interface implementation 2014-12-05 11:46:20 +02:00
Adrian Costina 0d2888a5a6 axi_mc_current_monitor: updated core to latest axi interface implementation 2014-12-05 11:45:37 +02:00
Adrian Costina 21591dc485 axi_mc_controller: updated core to latest axi interface implementation 2014-12-05 11:43:59 +02:00
Istvan Csomortani 11f41d1dff zynq_plddr3: Fix PLDDR3's Reset Generator
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:42:28 +02:00
Lars-Peter Clausen 324c0528c2 fmcomms6: Better cope with higher sample rates
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Lars-Peter Clausen 46156b7ceb fmcomms6: Add DMA overflow signal to ILA
This is useful for debugging DMA overflows.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Istvan Csomortani 56a8a54080 ad9625x2_fmc: Increase the dma fifo data depth 2014-12-03 12:13:08 +02:00
Istvan Csomortani 757c213165 ad9625x2_fmc: Integrate the dac spi interface into the SPI interface 2014-12-03 12:06:43 +02:00
Rejeesh Kutty 805d52346c fmcomms7: compilation fixes on plddr3 2014-12-02 10:39:01 -05:00
Rejeesh Kutty f01d1aae2d fmcomms7: compilation fixes on plddr3 2014-12-02 10:38:44 -05:00
Lars-Peter Clausen 95e113e1a3 fmcomms6: Connect DMA directly to the HP port
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen 45fc7bb7e2 fmcomms6: Set ila type to native
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen 5b68b79dec ad9467_fmc: Set ila type to native
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen 6197563506 up_axi: Fix up_raddr/up_waddr port width
Make sure that the port declaration width matches with the reg declaration
later on.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Adrian Costina d5422c2ecc fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections 2014-11-28 14:17:09 +02:00
Istvan Csomortani d5a1df2fe6 usdrx1_zc706: Update interrupts. 2014-11-27 14:06:13 +02:00
Istvan Csomortani eed1981ede usdrx1_fmc: Fix GT lane number definition. 2014-11-27 14:05:54 +02:00
Istvan Csomortani a576f7dc98 ad9671_zc706: Update interrupts 2014-11-27 14:05:43 +02:00
Istvan Csomortani 0ccc546aeb ad9671_fmc: Fix GT lane number definition 2014-11-27 14:05:34 +02:00
Istvan Csomortani ee7d427123 ad9671_fmc: Cosmetic changes
Delete trailing whitespaces.
2014-11-27 14:05:24 +02:00
Istvan Csomortani 419d38b9f6 kc705_base: Define sys_addr_mem_seg for dmafifo 2014-11-26 15:38:41 +02:00
Istvan Csomortani 6fd2f8c913 daq2_fmc: Update interrupts
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 15:38:24 +02:00
Istvan Csomortani bfd89dc9c7 daq2_kc705: Fix constraint file
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 15:38:10 +02:00
Istvan Csomortani 630f26442a daq2_kc705: Instantiate dmafifo module 2014-11-26 15:37:57 +02:00
Istvan Csomortani 00c7b23b21 daq2_fmc: Cosmetic changes
Delete trailing whitespaces, no functional changes.
2014-11-26 15:37:48 +02:00
Adrian Costina 199e86d715 fmcomms2: Added iic_fmc_intr to the zed top file 2014-11-26 11:47:16 +02:00
Adrian Costina 03751827cb fmcomms2: Updated vc707 project
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:47:06 +02:00
Adrian Costina 40c5816bd7 fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts 2014-11-26 11:46:53 +02:00
Istvan Csomortani 626b719ad8 ad6676ebv_vc707: Update the interrupts 2014-11-26 10:56:47 +02:00
Istvan Csomortani 322324b891 ad6676evb_vc707: Add support for linear flash 2014-11-26 10:56:36 +02:00
Istvan Csomortani 67f82c9e3e ad6676_fmc: Fix GT lane number definition 2014-11-26 10:56:23 +02:00
Lars-Peter Clausen 81f0e417d4 Add Vivado version check to adi_project_create
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.

By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.

Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-25 18:35:11 +01:00
Adrian Costina 2e72a2cc0c fmcomms1: Updated VC707 project with latest interrupts and linear flash. Fixed constraints and constraint priority 2014-11-25 15:00:00 +02:00
Adrian Costina dbc9da8598 fmcomms1: Updated KC705 project with latest interrupts. Fixed constraints and constraint priority 2014-11-25 14:56:22 +02:00
Adrian Costina 87324d8a14 fmcomms1: Updated AC701 project with latest interrupts. Fixed constraints and constraint priority 2014-11-25 14:54:01 +02:00
Adrian Costina b8ab2ff847 fmcomms1: updated common project
- increased the DMA FIFOs to 64
- added axi slices to the source and destination for DMAs
- for microblaze systems, increade the ad9643 dma data width at destination
- removed sys_fmc_dma_clk and used the sys_200m_clk instead for DMA data transfer
2014-11-25 14:51:42 +02:00
Istvan Csomortani 2bd154ad59 xfest14_zed: Update project to 2014.2 2014-11-25 12:53:42 +02:00
Istvan Csomortani a1e67a5912 ad9625x2_fmc: dmafifo address width now is an argument of the process 2014-11-24 19:22:18 +02:00
Istvan Csomortani 660424ef99 fmcomms6_fmc: Update interrupts 2014-11-24 18:23:35 +02:00
Istvan Csomortani 56aefb62ed fmcomms6_fmc: Cosmetic changes
Delete trailing white spaces, and fix alignment.
2014-11-24 18:23:34 +02:00
Istvan Csomortani 68ac015825 daq1_fmcl: Fix GT lane number definitions
Update which fix issues caused by GT lane number parameters change. (commit f8e7796592)
2014-11-24 18:23:33 +02:00
Istvan Csomortani 0ecfc14e95 daq1_fmc: Update interrupts. 2014-11-24 18:23:32 +02:00
Istvan Csomortani 9b104f1657 daq1_fmc: Get rid of the concat module inside the block design.
xl_concat just causing troubles, no need to use it, if not justified.
2014-11-24 18:23:30 +02:00
Istvan Csomortani 64b4d0177e ad9467_zed: Using ad_iobuf module for IO buffer instantiations on top
No functional changes, we just try to keep consistency.
2014-11-24 18:23:29 +02:00
Istvan Csomortani 83c2eefea2 ad9467_fmc: Update interrupts 2014-11-24 18:23:28 +02:00
Istvan Csomortani 114406335d ad9467_fmc: Connect dma controller directly to the HP port 2014-11-24 18:23:27 +02:00
Rejeesh Kutty 67065a3130 ad9680_eval: removed 2014-11-24 11:04:34 -05:00