8bd5fa5802
kc705: Common, fixed address range for the flash. Changed the start address so that it won't interfere with other cores
2015-05-23 00:10:06 +03:00
a6cae6b477
iobuf: do is a system verilog keyword
2015-05-21 14:06:17 -04:00
b311b9dac6
a10gx- updates
2015-05-14 14:35:42 -04:00
515dfd88d4
a10gx- added
2015-05-11 11:56:22 -04:00
3d4e9eb36a
ac701: common, commit ethernet reset pin
2015-05-11 16:41:28 +03:00
bad821ba1c
sys_dmafifo: Update the p_sys_dacfifo process
...
Update the ports and parameters at util_dacfifo instantiation.
2015-05-11 12:20:47 +03:00
81a20b4abb
rfsom- apisys lb updates
2015-05-08 15:22:17 -04:00
68570c1815
vc707: Common system mig, updated datawidth to 256 from 128
2015-05-08 10:51:27 +03:00
2a8703763e
zc706pr - 706 partial reconfiguration
2015-05-04 12:33:28 -04:00
aced144916
itx045: updates
2015-05-01 16:18:23 -04:00
ff443655ca
itx045: add ps7 settings
2015-05-01 16:17:59 -04:00
19ef85cec3
vc707: Changed mig project to use BANK_ROW_COLUMN, as it seems this mode gives best performance
2015-04-28 17:15:58 +03:00
272148eee5
rfsom: sdio 50mhz
2015-04-23 15:30:50 -04:00
7611c2ae17
kcu105: ddr mig rbc to rcb
2015-04-23 15:30:48 -04:00
f232a36141
common: Place HDMI interface registers into the IOB
...
The paths from the HDMI interface registers to the IO pads are
unconstrained. This means the P&R can in theory put the register anywhere
which could lead to stability issues on the interface, depending on what
else is in the fabric. To get predictable delays for the register to IO pad
path place the register into the IOB section.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-23 14:33:47 +02:00
e25cfb9d9f
rfsom: ddr configuration
2015-04-22 13:45:11 -04:00
a100ecd308
util_dacfifo: Update BRAM DAC Fifo
...
The fifo will be placed between the DMAC and the Upack module, all the interfaces were updated.
2015-04-21 15:45:56 +03:00
afea42f444
rfsom: Use interface connection for the I2S stream
...
Use a interface connection for the I2S stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:26 +02:00
90e132d203
mitx045: Use interface connection for the I2S stream
...
Use a interface connection for the I2S stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
7f26bfe436
zed: Use interface connection for the I2S stream
...
Use a interface connection for the I2S stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
06e37b0082
common: zed: Use interface to connect I2C core to the I2C mixer
...
Use a interface connection for the I2C connection instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
7da59a435f
common: rfsom: Use interface connection for the HDMI DMA stream
...
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
1f2ecaf037
common: mitx045: Use interface connection for the HDMI DMA stream
...
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
1d66cf63b6
common: zc706: Use interface connection for the HDMI DMA stream
...
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
ab5c7bb57b
common: zc702: Use interface connection for the HDMI DMA stream
...
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
70deb1eed1
common: zed: Use interface connection for the HDMI DMA stream
...
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
38722e569b
common: zed: Fix audio DMA reset signals
...
Make sure to connect the I2S and SPDIF core DMA reset signals to the correct net.
Fixes audio support on the ZED board.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
6d0a2bf64c
axi_adcfifo: added
2015-04-07 16:21:39 -04:00
4f7f109056
util_adcfifo: added
2015-04-07 16:08:38 -04:00
0b00073ce5
rfsom: add ddr parameters
2015-04-03 13:42:27 -04:00
8ed301a264
AC701: Common, removed system clock constraint
2015-04-02 11:51:20 +03:00
408dc6f018
ac701_base: Change data and instruction memory range to 8kbyte
2015-04-02 11:34:20 +03:00
bf1a50ef0c
mitx: common, fixed number of gpios enabled
2015-03-31 16:16:40 +03:00
4f69ae19c5
adv7511_mitx045: Update latest frame work.
2015-03-30 17:54:37 +03:00
c00633d1ac
adv7511_ac701: Update project and common files to the new framework.
2015-03-30 15:23:26 +03:00
67c8d02110
kc705/vc707: consistency fixes
2015-03-26 14:00:58 -04:00
1fcccacdf5
kc705/vc707: consistency fixes
2015-03-26 14:00:50 -04:00
daac204676
kc705: gpio bd
2015-03-26 10:14:12 -04:00
a74c61d6d5
vc707: gpio_bd changes
2015-03-23 10:00:46 -04:00
69326a72ef
VC707: Updated base design
2015-03-20 18:20:44 +02:00
d72c525b46
rfsom: sd1 to sd0 changes
2015-03-19 09:34:14 -04:00
fb5966f9fd
rfsom: sd1 to sd0 changes
2015-03-19 09:34:13 -04:00
6cc8f142f1
rfsom: sd1 to sd0 changes
2015-03-19 09:34:12 -04:00
72b41c981f
kc705_base: Fix base address overlap
2015-03-18 10:33:17 +02:00
cea2d90eb2
base_kc705: Fix different issues
...
+ No more constant block inside IPI.
+ Gpio switch/led is on the axi_gpio first channel.
+ Fix the address map
+ Remove hdmi/spdif related constraints from base constraints
2015-03-16 19:10:57 +02:00
65654b77ff
fmcomms2_kc705: Update design to the new hdl framework
2015-03-13 18:54:28 +02:00
7befef6662
fmcomms2_zed: Update design to the new hdl framework
2015-03-13 18:52:57 +02:00
ea303c6f61
zc702: Updated base design to the latest model
2015-03-13 12:44:08 +02:00
8ad8ec4d1e
ml605 removed
2015-03-12 13:00:28 -04:00
68361bafd4
zc706_base: The FCLK_CLK2 is not used.
2015-03-11 18:10:32 +02:00
ae16aeb064
kcu105/adv7511: moved hdmi/spdif out of base design
2015-03-10 16:15:15 -04:00
d7993401e6
kcu105/adv7511: moved hdmi/spdif out of base design
2015-03-10 16:15:14 -04:00
8967903d76
zc706: intr sensitivity level-high
2015-03-10 16:05:05 -04:00
a68463d033
rfsom: board updates
2015-03-10 15:26:31 -04:00
e38356b243
rfsom: board updates
2015-03-10 15:26:24 -04:00
f0395b646c
plddr3: ad_connect updates
2015-03-09 16:07:37 -04:00
031dffa80c
zc706: move gpio/spi to base design
2015-03-09 16:07:02 -04:00
2302f282d3
sys_dmafifo: ad_connect updates
2015-03-09 16:06:06 -04:00
545c0baada
kcu105: gpio led/sw merged to bd default
2015-03-09 16:05:28 -04:00
b31d9abd91
kcu105: gpio/spi moved to base design
2015-03-09 16:04:09 -04:00
1db5f4696f
kcu105: isolate ddr-300M from interconnect-100M timing
2015-03-06 12:37:31 -05:00
91765fdd82
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
7bf4141a3f
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
bf1388b05e
kcu105: rev.d changes
2015-03-04 12:43:04 -05:00
383cf3b3a3
rfsom: schematic changes
2015-02-18 14:32:20 -05:00
d2e9b1fe03
rfsom: schematic changes
2015-02-18 14:32:04 -05:00
996e1b7970
rfsom: constraint updates
2015-02-03 14:20:34 -05:00
d69d105b5d
vc707_common: Fix address mapping
...
The axi_ethernet/eth_buf/S_AXI_2TEMAC address space and axi_ethernet/eth_mac/s_axi/Reg address
segment does not exist in 2014.4.
2015-01-29 12:22:06 +02:00
e8ff30119d
vc707_xdc: Delete unnecessary clock definition
2015-01-29 11:39:10 +02:00
6c8ea24f20
common: Update VC707 base design to 2014.4
2015-01-28 16:24:52 +02:00
5a77ab0161
a5gt:common: Added phy reset signal from ethernet in pin assignments
2015-01-23 12:31:41 +02:00
050f17e034
a5gt3: common: corrected naming in pin assignments. added reset signal from FPGA2
2015-01-23 12:30:16 +02:00
72e89852b6
daq2/kc705: 2014.4 updates
2015-01-14 12:58:08 -05:00
b595cce697
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:18 -05:00
b0b4bfe531
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:17 -05:00
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
65d9f08763
zc706: mig 2014.4
2015-01-09 14:12:52 -05:00
868df1aac8
zc706: mig 2014.4
2015-01-09 14:12:51 -05:00
f566268db5
zed_common: Updated common to 2014.4
2015-01-08 11:59:26 +02:00
eb569b991d
dmafifo- remove util fifo setup
2015-01-06 16:23:14 -05:00
9e707d8a33
rfifo: wrapper updates
2015-01-06 16:17:33 -05:00
a944deebd5
wfifo: wrapper updates
2015-01-06 16:17:25 -05:00
61ba4f4357
rfsom: updated to rfsom
2014-12-23 14:03:58 -05:00
614dfcd93c
rfsom: updated to rfsom
2014-12-23 14:03:57 -05:00
ee52602c89
rfsom: initial commit
2014-12-23 14:03:55 -05:00
0de1a38245
zc706: 2014.4 update
2014-12-23 14:03:52 -05:00
71baa129a7
VC707: Fixed linear flash timings
2014-12-19 15:45:14 +02:00
59e610be09
zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc
2014-12-17 19:07:43 +02:00
77fa96fa67
plddr3: sys-rst from board pushbutton
2014-12-15 12:58:54 -05:00
ed7f8b4908
plddr3: sys-rst from board pushbutton
2014-12-15 12:58:44 -05:00
caa0268434
base_design: External IIC reset is connected to Vcc
...
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:13:07 +02:00
e7c920bbd9
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
a6b7b9d880
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:20:39 +02:00
7e18162632
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:48:37 +01:00
34ffa15b12
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:39:17 +02:00
3cc890e604
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:49:09 +01:00
3bc9b25e96
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:47:02 +01:00
12f1873e17
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:08:55 +02:00
c0f4d7e2b5
mitx045_common: Definition file patch
...
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.
NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
cdd1408d3c
dmafifo: parameterized address width
2014-11-20 09:28:02 -05:00
Adrian Costina
Rejeesh Kutty
Istvan Csomortani
Lars-Peter Clausen
Michael Hennerich