6338dfd8b7
ad9361: ip defaults & rst output
2015-06-05 09:19:39 -04:00
91b0f70972
library: remove drp cntrl
2015-06-02 09:58:57 -04:00
7c9bc40c75
axi_ad9361&TDD: Update TDD
...
+ Delete unnecessary registers
+ Add the module ad_addsub.v to resolve additions and subtractions inside TDD control
+ Redefine the burst logic
+ Redesign the control signal generations
+ Note: This patch fix the TDD related timing violations
2015-05-13 14:03:01 +03:00
2e7135c3c2
axi_ad9361_tdd: Initial commit.
...
Add the TDD register map and TDD control module. Add TDD integration changes to axi_ad9361 IP core.
2015-05-11 12:20:44 +03:00
e3b834ea02
axi_ad9361: Add CDC constraints
...
Add proper constraints for all the CDC synchronizer paths to the axi_ad9361
core.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-17 20:12:06 +02:00
a388ccab0a
fmcomms2/c5soc: initial checkin
2014-07-02 14:56:00 -04:00
e650253013
library: register map changes and for mathworks
2014-06-24 14:22:05 -04:00
842cd98b61
ad9361: adc loopback option
2014-05-27 12:15:02 -04:00
580808e146
axi_ad9361: added
2014-03-11 20:01:55 -04:00
Rejeesh Kutty
Istvan Csomortani
Lars-Peter Clausen