Commit Graph

24 Commits (2f35ce8a5126ef2a358f7b07087b48160bb9f278)

Author SHA1 Message Date
Iulia Moldovan 961ebe0cc2 projects: Update .v files according to guideline
Deleted lines after endmodule and consecutive empty lines.
Modified parentheses, extra spaces.
Fixed indentation.
Fixed parameters list to be each parameter on its line.

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-06-28 18:06:56 +03:00
Laszlo Nagy 4ce153e6e1 all/system_top.v: loopback gpio lines
Create loopback on unused GPIO lines since Linux may rely on it.
2018-10-04 14:19:37 +03:00
Laszlo Nagy 31318cf311 all/system_top.v: drive unused gpio inputs with zero
The loopback on the unused gpio inputs consumes routing resources
while does not gives any value for the software.

Connect these lines to zero instead.
2018-08-10 17:00:11 +03:00
Laszlo Nagy fa7c85a9eb all: Drive undriven input signals, complete interface
- connect unused GPIO inputs to loopback
- connect unconnected inputs to zero
- complete interface for system_wrapper instantiated in all system_top

fixes incomplet portlist WARNING [Synth 8-350]
fixes undriven inputs WARNING [Synth 8-3295]

The change excludes the generated system.v and Xilinx files.
2018-08-10 17:00:11 +03:00
AndreiGrozav ebae8bf8c1 Remove interrupts from system_top for all xilinx projects
- remove interrupts from system_top
- for all suported carriers:
	- remove all interrupt bd pins
	- connect to GND all initial unconnected interrupt pins
- update ad_cpu_interrupt procedure to disconnect a interrupt from GND
before connectiong it to another pin.
2018-08-10 10:10:58 +03:00
Istvan Csomortani 425e803364 license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
Istvan Csomortani 84b2ad51e2 license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
Istvan Csomortani 85ebd3ca01 license: Update license terms in hdl source files
Fix a few gramatical error, fix the path of the top level license
files.
2017-05-29 09:55:41 +03:00
Istvan Csomortani 9055774795 all: Update license for all hdl source files
All the hdl (verilog and vhdl) source files were updated. If a file did not
have any license, it was added into it. Files, which were generated by
a tool (like Matlab) or were took over from other source (like opencores.org),
were unchanged.

New license looks as follows:

Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.

Each core or library found in this collection may have its own licensing terms.
The user should keep this in in mind while exploring these cores.

Redistribution and use in source and binary forms,
with or without modification of this file, are permitted under the terms of either
 (at the option of the user):

  1. The GNU General Public License version 2 as published by the
     Free Software Foundation, which can be found in the top level directory, or at:
https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html

OR

  2.  An ADI specific BSD license as noted in the top level directory, or on-line at:
https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
2017-05-17 11:52:08 +03:00
Istvan Csomortani 1c23cf4621 all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00
Istvan Csomortani f77f928444 fmcomms2/zed: Fix the system_top
Fix the enable/txnrx control line.
2015-09-25 19:11:41 +03:00
Istvan Csomortani 0102e3e02c fmcomms2_ALL: Preserve backward compatibility for ENABLE/TXNRX control
By default the ENABLE/TXNRX pins are controlled by GPIOs, if the TDD module is enabled, the TDD FSM will take over the control of these two pins.
2015-07-01 13:54:01 +03:00
Istvan Csomortani 25f1ad73f0 fmcomms2/freqcvt: Update SPI interface I/O 2015-06-05 18:16:14 +03:00
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Istvan Csomortani f0d08abe03 fmcomms2: Fix system_top.v for a few carrier
Interrupts are connected inside IPI. Fix system_top for zed, zc702, zc706 and kc705.
2015-03-18 10:37:24 +02:00
Istvan Csomortani 7bdce3837e fmcomms2: Update interrupts
The new interrupts connections are made inside IPI by the process called 'ad_cpu_interrupt'.
2015-03-16 19:13:45 +02:00
Istvan Csomortani 7befef6662 fmcomms2_zed: Update design to the new hdl framework 2015-03-13 18:52:57 +02:00
Adrian Costina 7a55db59f6 fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections 2014-11-28 14:19:08 +02:00
Adrian Costina 303a2683a2 fmcomms2: Added iic_fmc_intr to the zed top file 2014-11-26 11:26:58 +02:00
Adrian Costina 4e11e39956 fmcomms2: Updated zed project
- Updated interrupt system to the latest implementation
- Fixed constraints
2014-11-07 13:59:46 +02:00
Istvan Csomortani f528873fa9 fmcomms2: Add an additional SPI interface for up/down converter board
Supported carriers are: ZC706, ZC702 and Zed.
2014-10-10 18:47:07 +03:00
Istvan Csomortani ca4c961891 fmcomms2: Use ad_iobuf instance on system_top
Use ad_iobuf instance on system top, instead of separate IOBUF instances.
2014-10-10 18:45:39 +03:00
Istvan Csomortani e21d26e456 fmcomms2: Cosmetic changes
Get rid of unwanted whitespaces.
2014-10-10 18:25:17 +03:00
ATofan 2c898bf3a2 Added ZC706, ZC702 and ZED FMCOMMS2 Vivado Project
ZC706 runs rx_clk at 250 MHz.
ZC702 and ZED run rx_clk at 200 MHz due to slower fabric.
The ZC702 and ZED projects need init_user in the boot procedure in order for the HP Ports to work correctly.
Both DDS and DMA mode work.
2014-03-18 15:27:42 +02:00