Commit Graph

897 Commits (30a869b02a6f144929280ba3f7d321c496eb0c3d)

Author SHA1 Message Date
Rejeesh Kutty 153a4cef18 daq2: missing sys_rst decl. 2014-12-19 13:00:21 +02:00
Rejeesh Kutty f4774d6f98 fifo2s: false path typo on source signals 2014-12-19 13:00:13 +02:00
Rejeesh Kutty ad144ef06a plddr3: sys-rst from board pushbutton 2014-12-19 13:00:07 +02:00
Rejeesh Kutty 33a8c8a155 plddr3: sys-rst from board pushbutton 2014-12-19 13:00:01 +02:00
Rejeesh Kutty 0cc29fe03b plddr3: sys-rst from board pushbutton 2014-12-19 12:59:54 +02:00
Rejeesh Kutty 51bdcb1b12 plddr3: sys-rst from board pushbutton 2014-12-19 12:59:48 +02:00
Rejeesh Kutty daba3fb72e plddr3: sys-rst from board pushbutton 2014-12-19 12:59:42 +02:00
Rejeesh Kutty 758ac6bb8e plddr3: sys-rst from board pushbutton 2014-12-19 12:59:35 +02:00
Adrian Costina 1a9eb8196a VC707: Fixed linear flash timings 2014-12-18 17:49:00 +02:00
Adrian Costina 656246f2ba fmcomms2: Updated VC707 project to fix ethernet problem 2014-12-17 16:16:01 +02:00
Rejeesh Kutty c4249ae274 Merge branch 'hdl_2014_r2' 2014-12-11 11:33:05 -05:00
Istvan Csomortani 9e8fd8ed9e base_design: External IIC reset is connected to Vcc
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:14:54 +02:00
Rejeesh Kutty 842ba19aaa fmcomms2/ml605: compilation fixes 2014-12-09 14:31:12 -05:00
Rejeesh Kutty d7a6b5e6d0 fmcomms2/ml605: compilation fixes 2014-12-09 14:31:11 -05:00
Rejeesh Kutty d57b6b01c6 fmcomms2/ml605: compilation fixes 2014-12-09 14:31:10 -05:00
Michael Hennerich 9103f6706e Merge branch 'hdl_2014_r2' of https://github.com/analogdevicesinc/hdl into hdl_2014_r2 2014-12-09 17:38:37 +01:00
Michael Hennerich 138e789fb6 projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
sys_concat_intc: don't reset NUM_PORTS to 6

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-09 17:38:16 +01:00
Rejeesh Kutty 0c6cbdd303 fmcadc4: fifo updates 2014-12-09 10:38:51 -05:00
Rejeesh Kutty f044ab94e0 fmcadc4: fifo updates 2014-12-09 10:38:50 -05:00
Rejeesh Kutty e2a9502e1e fmcadc4: fifo updates 2014-12-09 10:38:49 -05:00
Rejeesh Kutty a2607a8057 fmcadc4: fifo updates 2014-12-09 10:38:47 -05:00
Istvan Csomortani 2e4640d5c5 ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl 2014-12-09 16:17:46 +02:00
Istvan Csomortani c4152627f0 plddr3: Sync adc_wcnt_int to adc_wr and fix adc_dwr pulse width
The adc_wcnt_int must be synchronized to adc_wr. The adc_dwr signal pulse width was to long,
it needs to be just one adc_clk cycle.
2014-12-09 13:59:19 +02:00
Istvan Csomortani a0d5e7862e ad9467_kc705: Fix typos. 2014-12-09 12:07:49 +02:00
Istvan Csomortani 915ee7a268 fmcjesdadc1_kc705: Connect the SPI interrupt to the controller 2014-12-09 11:54:16 +02:00
Istvan Csomortani ee04eb637b ad9467_kc705: Fix interrupts 2014-12-09 11:54:08 +02:00
Adrian Costina 6aad2fbbb2 axi_hdmi_tx: Fixed typo in altera related core 2014-12-09 10:19:03 +02:00
Rejeesh Kutty abff7097f6 daq3: compilation fixes - latest changes 2014-12-08 14:50:03 -05:00
Rejeesh Kutty 8a72a6a0dc daq3: compilation fixes - latest changes 2014-12-08 14:49:52 -05:00
Rejeesh Kutty 7c3ed75b79 daq3: compilation fixes - latest changes 2014-12-08 14:49:40 -05:00
Rejeesh Kutty 40287f4d97 remove fmcadc3 2014-12-08 14:39:43 -05:00
Rejeesh Kutty b6b5759662 Merge branch 'hdl_2014_r2'
Conflicts:
	library/axi_ad9234/axi_ad9234.v
	library/axi_ad9234/axi_ad9234_channel.v
	library/axi_ad9234/axi_ad9234_constr.xdc
	library/axi_ad9234/axi_ad9234_if.v
	library/axi_ad9234/axi_ad9234_ip.tcl
	library/axi_ad9234/axi_ad9234_pnmon.v
	library/axi_ad9434/axi_ad9434.v
	library/axi_ad9434/axi_ad9434_core.v
	projects/ad9434_fmc/common/ad9434_bd.tcl
	projects/ad9467_fmc/common/ad9467_bd.tcl
	projects/common/kc705/kc705_system_bd.tcl
	projects/common/kcu105/kcu105_system_bd.tcl
	projects/common/mitx045/mitx045_system_bd.tcl
	projects/common/vc707/vc707_system_bd.tcl
	projects/common/zc706/zc706_system_bd.tcl
	projects/daq1/common/daq1_bd.tcl
	projects/daq1/zc706/system_top.v
	projects/fmcomms1/ac701/system_top.v
	projects/fmcomms1/common/fmcomms1_bd.tcl
	projects/fmcomms2/ac701/system_constr.xdc
	projects/fmcomms2/common/fmcomms2_bd.tcl
	projects/fmcomms2/zc702/system_constr.xdc
	projects/usdrx1/common/usdrx1_bd.tcl
2014-12-08 14:25:00 -05:00
Rejeesh Kutty 82b9ebe23d remove replaced projects 2014-12-08 10:45:12 -05:00
Rejeesh Kutty 19e4950b72 renamed to match official names 2014-12-08 10:44:15 -05:00
Michael Hennerich 84174460bb projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich bb6cc40902 projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich 8e4d0a1b60 projects/common: KCU105 VC707 KC705 sync microblaze core defaults
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Adrian Costina 4c05e8de5d motor_control: Updated project to Vivado 14.2. Temporary removed XADC
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:48:00 +02:00
Adrian Costina ea1a50c985 axi_mc_speed: updated core to latest axi interface implementation 2014-12-05 11:46:20 +02:00
Adrian Costina 0d2888a5a6 axi_mc_current_monitor: updated core to latest axi interface implementation 2014-12-05 11:45:37 +02:00
Adrian Costina 21591dc485 axi_mc_controller: updated core to latest axi interface implementation 2014-12-05 11:43:59 +02:00
Istvan Csomortani 11f41d1dff zynq_plddr3: Fix PLDDR3's Reset Generator
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:42:28 +02:00
Lars-Peter Clausen 324c0528c2 fmcomms6: Better cope with higher sample rates
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Lars-Peter Clausen 46156b7ceb fmcomms6: Add DMA overflow signal to ILA
This is useful for debugging DMA overflows.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Istvan Csomortani 56a8a54080 ad9625x2_fmc: Increase the dma fifo data depth 2014-12-03 12:13:08 +02:00
Istvan Csomortani 757c213165 ad9625x2_fmc: Integrate the dac spi interface into the SPI interface 2014-12-03 12:06:43 +02:00
Rejeesh Kutty 805d52346c fmcomms7: compilation fixes on plddr3 2014-12-02 10:39:01 -05:00
Rejeesh Kutty f01d1aae2d fmcomms7: compilation fixes on plddr3 2014-12-02 10:38:44 -05:00
Lars-Peter Clausen 95e113e1a3 fmcomms6: Connect DMA directly to the HP port
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen 45fc7bb7e2 fmcomms6: Set ila type to native
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00