Rejeesh Kutty
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00d9d4484e
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daq2/a10gx: 10AX115S3F45E2SGE3 version
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2016-05-17 17:16:25 +03:00 |
Adrian Costina
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657144d9a7
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a10gx: Updated base design and DAQ2 to the new revision of the a10gx board
- tried using ATX PLL and fPLL for TX transceiver clocks, but could not get them to lock
- CMU PLL works correctly as temporary solution
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2016-03-28 13:21:36 +03:00 |
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Rejeesh Kutty
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a87b8fbf94
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a10gx- base system only
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2015-07-20 09:29:30 -04:00 |
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Rejeesh Kutty
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1f7745610e
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daq2- ddr updates
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2015-07-14 12:46:52 -04:00 |
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Rejeesh Kutty
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d111692608
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daq2/a10gx- ddr-ref @133
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2015-06-04 10:53:16 -04:00 |
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Rejeesh Kutty
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aa24c442f5
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a10gx- no-ddr
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2015-06-01 11:00:01 -04:00 |
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Rejeesh Kutty
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a6cae6b477
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iobuf: do is a system verilog keyword
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2015-05-21 14:06:17 -04:00 |
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Rejeesh Kutty
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b311b9dac6
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a10gx- updates
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2015-05-14 14:35:42 -04:00 |
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Rejeesh Kutty
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515dfd88d4
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a10gx- added
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2015-05-11 11:56:22 -04:00 |