657144d9a7
a10gx: Updated base design and DAQ2 to the new revision of the a10gx board
...
- tried using ATX PLL and fPLL for TX transceiver clocks, but could not get them to lock
- CMU PLL works correctly as temporary solution
2016-03-28 13:21:36 +03:00
ad9ecbbbb6
daq2: Updated a10gx project to quartus 15.1.1
2016-02-05 17:43:05 +02:00
2309c4d83c
Makefiles: Removed " from path
2015-11-27 14:02:46 +02:00
159f6c1216
Makefiles: Updated Makefiles
...
- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
ea57b3c03c
daq2: A10GX, add project specific IP search paths
2015-11-25 10:58:36 +02:00
a81625e1fa
daq2: Updated a10gx project
2015-11-24 13:28:53 +02:00
5cc97c78d3
Makefiles: Update makefiles to include the nerw axi_gpreg / util_mfifo libraries
2015-11-10 09:32:50 +02:00
e36f27b061
daq2: Update A10GX project, with the latest changes.
...
Works with up to 64k samples
2015-11-04 14:54:09 +02:00
9d2b8809df
Makefiles: Updated Makefiles
2015-10-23 10:44:27 +03:00
a679251d7d
Makefiles: Update Make
2015-09-09 17:13:19 +03:00
f1d416a98b
daq2/a10gx- ethernet fix
2015-09-02 14:31:15 -04:00
1fff1076b1
daq2/a10gx- ethernet fix
2015-09-02 14:31:15 -04:00
15be942b74
daq2-a10gx- ignore cpu2ddr-io paths
2015-08-27 13:54:05 -04:00
78cf0fce0e
ddr/eth- pll refclock is defined by the cores
2015-08-21 14:42:15 -04:00
827fc1e29a
remove auto-pack disable
2015-08-20 13:54:16 -04:00
0e587dd955
daq2/a10gx-- ad-rst unpack
2015-08-19 13:26:38 -04:00
fdeeef3d77
daq2/a10gx-- intmem to ddr
2015-08-19 13:26:38 -04:00
413c322145
base/daq2- updates
2015-08-19 13:26:38 -04:00
fcc298d837
a10gx- move cores inside qsys
2015-07-21 11:06:17 -04:00
b3102b5095
daq2/a10gx-- xcvr+base changes
2015-07-21 11:01:45 -04:00
97b8468819
daq2- constraints
2015-07-20 09:32:17 -04:00
1d6a77049d
daq2- base/board split
2015-07-20 09:31:57 -04:00
4b8d764852
daq2- base system modifications
2015-07-20 09:31:44 -04:00
da2e7acacb
daq2- separate base/board systems
2015-07-20 09:31:15 -04:00
80dc3bf92f
daq2/a10gx: remove signal tap
2015-07-16 14:59:01 -04:00
a7da779b94
Makefile: Updated Makefiles
2015-07-16 18:19:42 +03:00
7c142178dd
daq2/a10gx- axi_jesd_xcvr sysref name changes
2015-07-15 15:59:52 -04:00
ffd767deb2
daq2/a10gx- axi_jesd_xcvr sysref name changes
2015-07-15 15:59:51 -04:00
1f7745610e
daq2- ddr updates
2015-07-14 12:46:52 -04:00
a2e7fb9491
daq2/a10gx: qsys signal tap version
2015-07-13 10:07:18 -04:00
8c0d74aa90
transceiver split up outside qsys
2015-07-10 11:44:42 -04:00
e40aac9ab6
transceiver split up outside qsys
2015-07-10 11:44:22 -04:00
f1dd2435b4
signal tap removed
2015-07-08 15:47:31 -04:00
c9e73b023d
signal tap removed
2015-07-08 15:46:52 -04:00
075b1e5424
daq2/a10gx: added axi_jesd_xcvr control
2015-07-07 10:22:36 -04:00
46fa91d5be
Makefile: Update Make files
2015-07-03 18:08:57 +03:00
6bc24e25eb
stap- need to be qsys
2015-06-29 13:26:32 -04:00
d25e02d7ee
stap- need to be qsys
2015-06-29 13:26:20 -04:00
6862655b0d
Add .gitattributes file
...
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
714d415804
daq2/a10gx- signaltap changes
2015-06-19 14:33:04 -04:00
51e6a74a3d
daq2/a10gx- add xmit swap
2015-06-19 14:32:59 -04:00
d6b1260678
daq2/a10gx- signal tap + gpio
2015-06-19 14:32:58 -04:00
67df6b3ea8
a10gx- disable lab cell on dsp input register
2015-06-19 14:32:54 -04:00
f587aa42d9
a10gx- tx sync
2015-06-10 14:32:25 -04:00
00b8c171b8
a10gx: pll locked to reset controller
2015-06-08 15:00:11 -04:00
f81d22a17a
altera- common timing check
2015-06-04 10:56:32 -04:00
d111692608
daq2/a10gx- ddr-ref @133
2015-06-04 10:53:16 -04:00
4a701d3895
a10gx- no-ddr
2015-06-01 11:00:02 -04:00
ad3198f623
a10gx: top level fixes
2015-05-21 14:06:15 -04:00
19b094cab5
daq2/a10gx- added jesd align
2015-05-20 15:39:27 -04:00
Adrian Costina
Istvan Csomortani
Rejeesh Kutty
Lars-Peter Clausen