Commit Graph

131 Commits (38037641af3a52bb2e61cadaf95fc9f2cf9c96ef)

Author SHA1 Message Date
bluncan 5405050518 common: vpk180: Add support for vpk180
Signed-off-by: bluncan <bogdan.luncan@analog.com>
2024-04-26 15:01:50 +03:00
Liam Beguin 887ffac0ed
scripts: Parallel build with pattern rules (#1202)
Drop shell for loops in favor of makefile pattern rules,
so make can run targets in parallel using -j.
This doesn't affect Vivado's own settings.

As a benchmark, 12th Gen Intel(R) Core(TM) i9-12900H 5GHz(max):
	$ make -C projects/adrv9009/zcu102/ clean-all
	$ time make -C projects/adrv9009/zcu102/ -j$CORES lib
CORES=1:
	real    9m27.223s
	user    9m2.556s
	sys     0m32.358s
CORES=8:
	real    1m54.639s
	user    16m26.512s
	sys     1m2.317s
i.e. about 5 times faster to build IP core dependencies.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-12-14 17:27:23 +00:00
Alin-Tudor Sferle ea29a37eae adi_xilinx_device_info: Update speed_grade_list 2023-07-25 19:49:33 +03:00
Iulia Moldovan c9a7d4d927 Add copyright and license to .tcl, .ttcl files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 15:22:26 +03:00
Iulia Moldovan c7af4daa2f library.mk: Update folders and files from make clean
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-04-28 17:02:13 +03:00
AndreiGrozav e883f6ecd6 adi_xilinx_device_info_enc: Enlarge detection
Add detection scenario for xazu*, xczu*, xqzu* and ultrascale+ packages.
2023-03-29 16:44:25 +03:00
Ionut Podgoreanu 7faefab1be library/scripts: Add SV support for Intel boards
Signed-off-by: Ionut Podgoreanu <ionut.podgoreanu@analog.com>
2022-12-13 16:26:02 +02:00
stefan.raus 88f48cba61 library/scripts/library.mk: clean files form tb
Update clean command to delete also files generated by simulation,
from 'tb' folders, covering cases for Xsim and ModelSim simulators.

Signed-off-by: stefan.raus <stefan.raus@analog.com>
2022-09-26 13:09:21 +03:00
LIacob106 a824bbfdbe library/scripts/adi_ip_xilinx.tcl: remove duplicate adi_env.tcl source
Signed-off-by: LIacob106 <liviu.iacob@analog.com>
2022-08-23 17:55:27 +03:00
Iulia Moldovan e02d31cdfd scripts: Set required Vivado version only in adi_env.tcl
Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-08-18 15:41:58 +03:00
Iulia Moldovan dde37124a4 scripts: Update Vivado version to 2021.2
Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-08-18 15:41:58 +03:00
Iacob_Liviu 482f0489a3 scripts: Merge adi_env.tcl into a single file
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
Nick Pillitteri 084d44c978 add ability to customize Xilinx IP library version to value other than "user" from a global variable. 2022-03-17 09:43:39 +02:00
LIacob106 9d94f21d89 scripts/adi_xilinx_device_info_enc.tcl: Change regex for vcu128
The regex does not match vcu128 as Ultrascale+. It matches for Ultrascale.
2022-01-12 17:32:47 +02:00
Laszlo Nagy 7112fbce7e library/scripts/adi_xilinx_device_info_enc.tcl: Add K26 support 2021-11-08 09:23:02 +02:00
LIacob106 e34346360d scripts: Add logic for vivado version check 2021-10-12 14:34:11 +03:00
Laszlo Nagy 4d12c4d99a scripts/adi_xilinx_device_info_enc.tcl: Add Versal support 2021-10-05 14:09:51 +03:00
Laszlo Nagy 2b242bf06f scripts/adi_ip_xilinx.tcl: Enable auto family support
Some IPs like JESD link layer were marked as not supported on Versal devices by
the current flow while other not (e.g. TPL).
The auto family support seems to workaround this issue.
2021-10-05 14:09:51 +03:00
stefan.raus cfe0c0ced5 adi_project_xilinx.tcl, adi_ip_xilinx.tcl: update version to 2021.1
Update vivado version from 2020.2 to 2021.1 in projects and library scripts.
2021-09-24 12:11:11 +03:00
Robin Getz b38747cefc Make system: Be explicit in license that cover the make/build system
The build system is covered under a 1 Clause BSD license. Make sure
users are aware.

Signed-off-by: Robin Getz <robin.getz@analog.com>
2021-09-16 16:50:53 +03:00
stefan.raus 9d5de2fc21 Update Vivado version to 2020.2
Update vivado version to 2020.2:
 - update default vivado version from 2020.1 to 2020.2
 - add conditions to apply specific contraints only in Out Of Context mode.
 - update DDR controler parameters for vcu118 and kcu105 dev boards
2021-07-29 14:06:42 +03:00
Istvan Csomortani 6178b42ba2 library.mk: Update CLEAN_TARGET 2021-02-16 15:11:53 +02:00
Sergiu Arpadi e252d538c2 adi_ip_xilinx: Add env var
add ADI_DISABLE_MESSAGE_SUPPRESION which
disables adi_xilinx_msg.tcl
2021-01-15 13:50:53 +02:00
Arpadi 51b5e4f58b tcl: Change Vivado version to 2020.1
handoff is now exported as .xsa
2021-01-15 13:50:53 +02:00
AndreiGrozav 585ed44983 Add 'SE Base' family to the supported FPGAs 2020-09-15 18:14:23 +03:00
AndreiGrozav 9122d98132 adi_intel_device_info_enc.tcl: Fix typo 2020-08-10 18:30:46 +03:00
AndreiGrozav e63478dbad library/scripts/adi_ip_xilinx: Fix critical warning 2020-05-18 14:22:59 +03:00
Istvan Csomortani 6535e5b2ba scripts/xilinx: Version mismatch is upgraded to ERROR
There is a major compatibility issue between 2019.1 and 2019.2.

The file system_top.hdf got a different file extention. This will
cause a compilation failer in the end of the build. To save time
and fail earlier, upgrade the version mismatch message to ERROR.

If user still wants to build a branch with different tool version
the variable ADI_IGNORE_VERSION_CHECK should be set to 1.
2020-05-15 12:16:35 +03:00
AndreiGrozav 74221eb42c adi_xilinx_device_info_enc: Add new packages
Add definition for new ultrascale device packages.
The package information is used by software for xcvr calibration.
At the moment, the factors that are influencing the calibration for the new
packages are not clear.
2020-03-19 14:28:05 +02:00
Istvan Csomortani adfeb435a4 scripts: Update Vivado version to 2019.1 2020-01-13 12:25:23 +02:00
Arpadi 25816ac1b3 adi_project_xilinx: removed set_property SCOPED_TO_REF 2020-01-13 12:25:23 +02:00
Laszlo Nagy c684c2cbd6 scripts/adi_ip_xilinx.tcl: add variable width for multi bus interfaces
Bus sizes often depend on parameters. In such cases the physical indexes
of the interfaces from the multi bus must be calculated based on parameters.
For each interface expose the formula that calculates the indexes to the
block design.
2020-01-13 09:55:25 +02:00
Istvan Csomortani fd74c270c5 adi_ip_xilinx: Add constraint files to constrs_1 fileset 2019-10-03 18:04:34 +03:00
Istvan Csomortani fa610d36c6 ad_ghdl_dir: Fix global variable name
In #PR318 the global variable $ad_phdl_dir name were changed to
$ad_ghdl_dir.
2019-07-23 10:29:37 +01:00
Istvan Csomortani 6a721c0bf0 adi_env: Update system level environment variable definition
Our internal repository was changed from phdl to ghdl. Update the
adi_env.tcl scripts and other scripts, which depends on the $ad_ghdl_dir
variable. This way the tools will see all the internal IPs too.
2019-07-22 11:00:45 +03:00
Istvan Csomortani 0f7a3b953a scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface 2019-06-29 06:53:51 +03:00
Istvan Csomortani 5329458a62 library/scripts: Rename adi_ip_alt.tcl to adi_ip_intel.tcl 2019-06-29 06:53:51 +03:00
Istvan Csomortani 363494ab9c library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
Istvan Csomortani 79b6ba29ce all: Rename altera to intel 2019-06-29 06:53:51 +03:00
Istvan Csomortani 4d966500a8 adi_ip_alt.tcl: Add comments to all proc 2019-05-31 10:32:40 +03:00
Istvan Csomortani f2b3b7f493 adi_ip_alt.tcl: Delete deprecated procs 2019-05-31 10:32:40 +03:00
Istvan Csomortani 17afb4d9c5 adi_ip.tcl: Fix adi_add_multi_bus proc
The loop should iterate through the number of interfaces defined by the
$num attribute,
2019-05-31 10:32:40 +03:00
Istvan Csomortani bd43b565ce adi_ip.tcl: Add comments to all proc
Add doxygen support for all proc. Description of the used layout can be
find at http://www.doxygen.nl/manual/docblocks.html#tclblocks
2019-05-31 10:32:40 +03:00
Istvan Csomortani 42d2738a30 axi/util_adxcvr: Add GTYE4 transceiver support 2019-04-12 16:19:54 +03:00
AndreiGrozav e1f0b301d3 Tools version upgrade
Vivado 2018.2 -> Vivado 2018.3
Quartus 18.0  -> Quartus 18.1
2019-04-12 10:48:50 +03:00
AndreiGrozav 23841478c6 Remove library/scripts/common_bd.tcl
Remove the script from the file list of the IPs that previously used it.
axi_clkgen: Add independent adi_auto_assign_device_spec proc
2019-04-09 16:07:14 +03:00
AndreiGrozav 7dcaaea04e library: Update scripts/adi_ad_ip.tcl and IPs
Fix library makefiles dep list using generic vendor info reg

Combine adi_int_bd_tcl with adi_auto_fill_bd_tcl procedure.
This change will simplify the process of generating makefiles for each library.
Removing the bd.tcl script from the adi_ip_files list will remove it from the
make dependency list.
2019-04-09 16:07:14 +03:00
AndreiGrozav 99412a503e library/scripts/*xilinx*: Auto-generate bd.tcl
Having a bd.tcl script in every IP is redundant.

adi_ip.tcl:
 - add adi_init_bd_tcl - creates a blanch bd.tcl and a
parameters temporary_case_dependencies.mk when compiling an IP.
Its main purpose is to generate the bd.tcl, which will be included in
the IP's file-set.
 - adi_auto_fill_bd_tcl will populate the empty bd.tcl based on the
top IP parameters and the presence of these parameters in
auto_set_param_list and auto_set_param_list_overwritable lists.
This task can not be performed by the first described procedure since
the file-set is not yet defined.

adi_xilinx_device_info_enc.tcl:
Split auto_set_param_list_overwritable from auto_set_param_list. As
the name states, some of the parameters are overwritable, this will help
when generating the bd.tcl script.

library.mk:
Include the temporary_case_dependencies.mk if it exists in the
IP root folder. The mentioned *.mk file contains non generic
dependencies for makefiles like targets to clean.
2019-03-30 11:26:11 +02:00
AndreiGrozav f4dda7f2d3 Remove unused script 2019-03-30 11:26:11 +02:00
AndreiGrozav f29e91a440 adi_intel_device_info_enc.tcl: Add all known intel supported packages 2019-03-30 11:26:11 +02:00