Commit Graph

3488 Commits (38a27d02f63f918a74dcf8ced2d6bd85aba100b0)

Author SHA1 Message Date
Rejeesh Kutty f695a45394 global clock fix 2014-06-03 09:23:23 -04:00
Adrian Costina f217139770 fmcomms2: added project for mini_itx, xc7z045 version 2014-06-02 14:06:10 +03:00
Adrian Costina c52327d0c6 common,adv7511: Added mitx045 platform. 2014-06-02 11:08:03 +03:00
Rejeesh Kutty 877b81a373 ad9625/vc707: working version 2014-05-30 15:07:23 -04:00
Rejeesh Kutty c789dce77e ad9625/zc706: added pl ddr3 fifo changes 2014-05-29 12:59:29 -04:00
Rejeesh Kutty 5b5bca400f ad9361: added adc loopback 2014-05-27 14:47:59 -04:00
Rejeesh Kutty 842cd98b61 ad9361: adc loopback option 2014-05-27 12:15:02 -04:00
Rejeesh Kutty 56ddce1e8c dmac: create fifo interface to avoid being treated as axi control stream 2014-05-27 10:25:14 -04:00
Rejeesh Kutty 0cd43e34f5 dds: zero scale fix 2014-05-21 11:54:49 -04:00
Istvan Csomortani 1d53d79e25 fmcomms2/common: Fix ad9361's interface
Loopback the l_clk to clk. l_clk is the device sampling clock, clk is used to
    synchronize the cores in case of a multiple device configuration.
2014-05-21 10:09:54 +03:00
Istvan Csomortani 25e4520726 fmcomms2/common: Delet trailing white spaces 2014-05-21 09:47:37 +03:00
Rejeesh Kutty bab90a19c2 fmcomms5/zc702: removed unused ila cores 2014-05-20 14:42:48 -04:00
Rejeesh Kutty 7e6b4ea9d0 fmcomms5: ignore only common clock to external clocks 2014-05-19 20:38:41 -04:00
Rejeesh Kutty 916afd460f axi_jesd_gt: synchronization support 2014-05-19 14:17:31 -04:00
Rejeesh Kutty 9a36075324 moved fmcomms5 2014-05-19 13:49:49 -04:00
Rejeesh Kutty 3aed3ba71c axi_ad9361: fmcomms5 changes 2014-05-19 12:41:12 -04:00
Rejeesh Kutty f73819f4d4 zc706: pl ddr3 initial checkin 2014-05-13 16:19:53 -04:00
Rejeesh Kutty a007add714 iqcorrection: missing input signals fix 2014-05-09 11:17:50 -04:00
Rejeesh Kutty f3f8374c75 ad9671: 2lane version 2014-05-08 18:33:26 -04:00
Istvan Csomortani c5b3dd3643 vc707 base : tcl update
- Added missing address space
    - Connect the sys_audio_clkgen/reset
2014-05-08 12:30:25 +03:00
Rejeesh Kutty 3ac1da178e kcu105: sane except for ddr4/ethernet 2014-05-06 15:39:05 -04:00
Rejeesh Kutty 51c0ee1e20 ml605: tcl updates 2014-05-06 09:29:21 -04:00
Rejeesh Kutty e7cbaca216 ml605: initial checkin 2014-05-05 11:24:12 -04:00
Rejeesh Kutty 53af7f3c1f ml605: initial checkin 2014-05-05 11:20:26 -04:00
Rejeesh Kutty 1d50489870 ad9361: ml605 updates 2014-05-05 11:03:57 -04:00
Rejeesh Kutty 4d4f66fbdd a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
Rejeesh Kutty 5f2fb45b24 library: ported hdmi tx to altera 2014-05-02 12:07:47 -04:00
Rejeesh Kutty b55d0d7ad1 a5soc: constraints for false paths 2014-04-30 16:14:30 -04:00
Rejeesh Kutty a10043c4f4 kcu105: base complete with ethernet errors 2014-04-30 14:41:43 -04:00
Rejeesh Kutty 87d326a474 ignore cache 2014-04-30 14:41:41 -04:00
Rejeesh Kutty ef60cce15e kcu105: added 2014-04-30 14:41:40 -04:00
Rejeesh Kutty be69c0c330 kcu105: initial checkin 2014-04-30 14:41:39 -04:00
Rejeesh Kutty 9900a56fa5 kcu105: initial checkin 2014-04-30 14:41:37 -04:00
Rejeesh Kutty 0b1ce14842 a5soc: basic hardware build 2014-04-30 12:40:27 -04:00
Rejeesh Kutty 99d66e7580 a5soc: initial-copy version 2014-04-30 12:40:26 -04:00
Rejeesh Kutty 681e4239df ad9671/a5gt: subclass-0 version 2014-04-28 21:31:21 -04:00
Rejeesh Kutty 06873aeddb ad9671/a5gt: subclass-0 version 2014-04-28 21:31:20 -04:00
Rejeesh Kutty d66f256f1c 9671/a5gt: 9671-sc1 version 2014-04-28 21:31:19 -04:00
Rejeesh Kutty f55288ef5d ad9671: altera - base changes 2014-04-28 21:31:18 -04:00
Rejeesh Kutty 02e8b27626 initial checkin-9250 copy 2014-04-28 21:31:16 -04:00
Rejeesh Kutty 2e7bf190b5 initial checkin-9250 copy 2014-04-28 21:31:15 -04:00
Adrian Costina 01de117b5f motor_control: Changed controller to PID controller. Some estetic changes 2014-04-28 17:57:51 +03:00
Rejeesh Kutty fa998a406b dma: parameter fix 2014-04-24 15:50:16 -04:00
Rejeesh Kutty 314ec3d343 altera-9250/dma: make id width generic 2014-04-24 14:54:19 -04:00
Rejeesh Kutty dfc2bba335 ad9671: updates to allow default adc setup routines 2014-04-23 16:39:28 -04:00
Rejeesh Kutty a1bcf345c6 ad9671: fix spi connections 2014-04-21 13:46:44 -04:00
Adrian Costina 213e852e11 motor_control: Initial commit 2014-04-18 18:57:18 +03:00
Rejeesh Kutty 503096de18 gt: change userready on drp clock 2014-04-17 16:09:55 -04:00
Istvan Csomortani b185d46573 Add a link to EngineerZone
Some users find these projects through github, and they do not know how/where to ask support.
2014-04-15 10:25:18 +03:00
Adrian Costina ba44ee63be fmcomms1: modified the fmcomms1_bd.tcl to make it compatible with latest wfifo 2014-04-14 17:04:04 +03:00