Commit Graph

44 Commits (3abd87631a85d0ae19c74056dd22b21d423af706)

Author SHA1 Message Date
Rejeesh Kutty cb97bc500a hdlmake updates 2016-10-17 16:29:57 -04:00
Rejeesh Kutty 7290bcc81a hdlmake- updates 2016-09-29 11:50:58 -04:00
Rejeesh Kutty 4950c6c773 adrv9371x - xcvr updates 2016-09-29 11:50:58 -04:00
Adrian Costina e40311eee9 adrv9371x: A10soc, connected DMAs through 128 bit SDRAM0 port at 175MHz 2016-09-29 09:14:37 +01:00
Adrian Costina f5809b8817 adrv9371x: a10soc, added adcfifos; connected the new reset to all peripherals; used the new f2sdram1 port 2016-09-24 10:09:05 +03:00
Adrian Costina 143423e3b9 adrv9371x: A10SOC, fix Makefile and system scripts to be compatible with altera 2016-09-21 18:13:02 +03:00
Adrian Costina 500d8bfb90 adrv9371x: A10GX, fix makefile and system_qsys.tcl script 2016-09-21 18:11:35 +03:00
Istvan Csomortani 16ee1336c3 Makefile: Update make files 2016-09-15 11:41:06 +03:00
Adrian Costina 521c41ce32 adrv9371x: Updated a10soc project. Common design differentiates between nios and a10soc carrier 2016-09-08 11:44:45 +03:00
Adrian Costina d18f6aa816 adrv9371x: A10GX, added adcfifo
- connected dac dma to 133 MHz clock
- set explicit clock rate to xcvr reference clock bridge
2016-08-26 14:46:48 +03:00
Adrian Costina 3c6cfdc7b5 adrv9371x: A10GX, switched TX lanes 2016-08-24 18:06:14 +03:00
Adrian Costina 215edb11c6 adrv9371: A10GX, updated design
- disable reconfiguration for RX transceivers and enabled the reconfiguration for TX transceiver. They cannot be enabled at the same time at this point
- update FIFO SIZE to 16 for all DMAs
- updated memory connections to 256 bit and moved clock connection to 133 MHz, for all DMAs.
2016-08-23 18:25:48 +03:00
Adrian Costina 270f8a6bbe adrv9371x: Updated project common 2016-08-22 16:58:21 +03:00
Rejeesh Kutty f697490de6 hdlmake- updates 2016-08-19 15:59:41 -04:00
Adrian Costina 41203d07e9 adrv9371x: A10GX, update SPI connection 2016-08-18 17:42:27 +03:00
dbogdan 03c83b59bf adrv9371x/a10soc: Export axi_ad9371_s and xcvr_reconfig_avmm 2016-08-17 19:03:53 +03:00
Rejeesh Kutty ce1fed1ce6 dmafifo- adc/dac split 2016-08-16 12:54:39 -04:00
Adrian Costina eb55f600fb adrv9371x: Initial commit
-need to fix dc filter module for AD9371 / altera
2016-08-16 15:50:46 +03:00
Adrian Costina 5c27ccd1fa adrv9371x: Added common qsys tcl 2016-08-16 15:34:10 +03:00
dbogdan 4658686ae1 adrv9371x/a10soc: Misc changes for being able to run Linux 2016-08-16 11:56:25 +03:00
Dragos Bogdan 39c1c83d00 adrv9371x/a10soc: Fix spi_csn assignment 2016-08-12 10:07:11 +03:00
Adrian Costina 0b0aa8e6c0 Makefile: Add MMU option to altera makefiles 2016-08-11 17:46:54 +03:00
Istvan Csomortani 0cd608a7e2 lib_refactoring: Update Make files 2016-08-08 16:38:38 +03:00
Istvan Csomortani df36902713 lib_refactoring: Fix path of the IO macros 2016-08-08 15:07:19 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty e42b4ea378 hdlmake- updates 2016-08-04 13:28:25 -04:00
Istvan Csomortani 7ca8e10004 make: Update Make files 2016-08-01 14:24:48 +03:00
Istvan Csomortani 2e80dec513 adrv9371x/zc706: Update project with the new axi_dacfifo 2016-06-22 12:33:47 +03:00
Rejeesh Kutty eaf4d4a19d makefile updates 2016-06-10 14:26:14 -04:00
Istvan Csomortani f84fafaaac adrv9371x/zc706: Fix system top
The dac_fifo_bypass gpio is an internal gpio only. No need for IOBUF.
2016-06-10 10:11:27 +03:00
Rejeesh Kutty 3351ff607e adrv9371x- need to investigate merge with avalon 2016-06-02 16:22:53 -04:00
Rejeesh Kutty c293c04634 hdl make updates 2016-06-01 13:53:09 -04:00
Rejeesh Kutty 46b464ed72 adrv9371/a10soc- qsys updates 2016-06-01 13:48:51 -04:00
Rejeesh Kutty a958ef27da adrv9371- qsys updates 2016-06-01 13:48:51 -04:00
Rejeesh Kutty 5b2a90ffff adrv9371- qsys 2016-06-01 13:48:51 -04:00
Rejeesh Kutty af45acfcb9 ad9371- qsys updates 2016-06-01 13:48:51 -04:00
Istvan Csomortani 1853c6921d adrv9371x/zc706: Fix typo in system_top 2016-05-27 14:13:55 +03:00
Istvan Csomortani a6fbf6c20b adrv9371x: Update the Makefiles 2016-05-27 14:13:55 +03:00
Istvan Csomortani 32d46389f2 adrv9371x: Move GTs AXI interface to HP3
If the VDMA and the GTs AXI are connected to the same HP port, the
HDMI won't work on full resolution (1080p). Care should be taken, this can
affect the receive and observation paths (both are connected to HP2).
2016-05-27 14:13:55 +03:00
Istvan Csomortani b452a8e2d4 adrv9371x: Connect bypass and data underflow 2016-05-27 14:13:55 +03:00
Istvan Csomortani 3859cba186 adrv9371x/zc706: Add PL_DDR FIFO to the design 2016-05-27 14:13:55 +03:00
Rejeesh Kutty 0d1c4d232e a10soc- updates-1 2016-05-20 16:14:57 -04:00
Rejeesh Kutty 09520709b0 make updates 2016-05-20 12:35:45 -04:00
Rejeesh Kutty f92e8509bb adrv9371x- added 2016-05-20 11:46:25 -04:00