ee89862de9
ad6676evb: 2014.4 updates
2015-03-17 16:53:13 -04:00
1da8356f05
ad6676evb: 2014.4 updates
2015-03-17 16:53:13 -04:00
7456ca67a8
ad6676evb: 2014.4 updates
2015-03-17 16:53:13 -04:00
08a773b92d
fmcomms2/rfsom: interrupt fix
2015-03-17 16:31:12 -04:00
a92c5cb4ff
fmcomms7: 2014.4 updates
2015-03-17 14:01:47 -04:00
18891d036b
fmcomms7: 2014.4 updates
2015-03-17 14:01:47 -04:00
b2e05ce108
fmcomms7: 2014.4 updates
2015-03-17 14:01:47 -04:00
3e73b711e8
fmcomms7: 2014.4 updates
2015-03-17 14:01:47 -04:00
8cb96533d3
fmcomms7: 2014.4 updates
2015-03-17 14:01:46 -04:00
7bdce3837e
fmcomms2: Update interrupts
...
The new interrupts connections are made inside IPI by the process called 'ad_cpu_interrupt'.
2015-03-16 19:13:45 +02:00
65b16551c3
fmcomms2_kc705: Fix system_top connections
2015-03-16 19:12:04 +02:00
cea2d90eb2
base_kc705: Fix different issues
...
+ No more constant block inside IPI.
+ Gpio switch/led is on the axi_gpio first channel.
+ Fix the address map
+ Remove hdmi/spdif related constraints from base constraints
2015-03-16 19:10:57 +02:00
65654b77ff
fmcomms2_kc705: Update design to the new hdl framework
2015-03-13 18:54:28 +02:00
7befef6662
fmcomms2_zed: Update design to the new hdl framework
2015-03-13 18:52:57 +02:00
f7dd466469
adi_board.tcl : Fix some issue with the ad_mem_hpx_interconnect
...
Sometimes the find_bd_objs does not do its job, so need to double check that the interface clock is already connected to the p_clock or not.
Not sure about the cause of this behavior, need more investigation. Issue was found first at KC705 base design.
2015-03-13 18:51:21 +02:00
70e1d13a7b
fmcomms2: Updated project
2015-03-13 12:49:17 +02:00
ea303c6f61
zc702: Updated base design to the latest model
2015-03-13 12:44:08 +02:00
17d8c1b72b
daq2: move intrs into ipi
2015-03-12 16:17:17 -04:00
3a2d1004b5
daq2: move intrs into ipi
2015-03-12 16:17:09 -04:00
b1b46ed820
daq2: move intrs into ipi
2015-03-12 16:17:04 -04:00
ff3dcbc2cb
daq2: move intrs into ipi
2015-03-12 16:16:55 -04:00
8ad8ec4d1e
ml605 removed
2015-03-12 13:00:28 -04:00
e520f5c55a
ad9671_fmc: removed
2015-03-12 12:00:46 -04:00
73680d1ed9
fmcomms2/ml605: removed
2015-03-12 11:59:18 -04:00
18c03a57f8
adv7511/mb: added board files
2015-03-12 11:09:32 -04:00
7f462a1b34
adv7511/mb: added board files
2015-03-12 11:09:27 -04:00
15967f913f
adv7511/mb: added board files
2015-03-12 11:09:20 -04:00
8d0c3573cc
adv7511/kcu105: hdmi/spdif moved out of base design
2015-03-11 15:22:39 -04:00
491b67c13a
adv7511/kcu105: hdmi/spdif moved out of base design
2015-03-11 15:22:39 -04:00
68361bafd4
zc706_base: The FCLK_CLK2 is not used.
2015-03-11 18:10:32 +02:00
a3e73a1837
ad9467_fmc: Fix port names at ILA logic
...
In the version 2014.2 the output port of a constant module was changed from 'const' to 'dout'.
This commit fix the non working ILA.
2015-03-11 14:45:02 +02:00
543bfe9d44
daq2/kcu105: removed hdmi/spdif
2015-03-10 16:15:16 -04:00
ae16aeb064
kcu105/adv7511: moved hdmi/spdif out of base design
2015-03-10 16:15:15 -04:00
d7993401e6
kcu105/adv7511: moved hdmi/spdif out of base design
2015-03-10 16:15:14 -04:00
09b916d0c7
kcu105/adv7511: moved hdmi/spdif out of base design
2015-03-10 16:15:13 -04:00
20b2c19987
kcu105/adv7511: moved hdmi/spdif out of base design
2015-03-10 16:15:11 -04:00
ad41d250a8
kcu105/adv7511: moved hdmi/spdif out of base design
2015-03-10 16:15:10 -04:00
1cf8092ba9
fmcomms2/zc706: spi/gpio changes
2015-03-10 16:06:22 -04:00
631c71373a
fmcomms2/zc706: spi/gpio changes
2015-03-10 16:06:18 -04:00
796a0f4f2b
fmcomms2/zc706: spi/gpio changes
2015-03-10 16:06:13 -04:00
8967903d76
zc706: intr sensitivity level-high
2015-03-10 16:05:05 -04:00
7012172f66
fmcomms2: spi/gpio moved to base design
2015-03-10 15:27:32 -04:00
7da65ef3db
fmcomms2: spi/gpio moved to base design
2015-03-10 15:27:28 -04:00
abae36b12f
fmcomms2: spi/gpio moved to base design
2015-03-10 15:27:22 -04:00
9e57e919c4
fmcomms2: spi/gpio moved to base design
2015-03-10 15:26:57 -04:00
a68463d033
rfsom: board updates
2015-03-10 15:26:31 -04:00
e38356b243
rfsom: board updates
2015-03-10 15:26:24 -04:00
c0eef42647
adi_board: enable ps7 hp if needed
2015-03-09 16:12:23 -04:00
59457cb3d4
daq2/zc706: base system updates
2015-03-09 16:10:56 -04:00
ce5ece5494
daq2/zc706: base system updates
2015-03-09 16:09:54 -04:00
104782af87
daq2/kcu105: base system updates
2015-03-09 16:09:07 -04:00
548ae9d39e
daq2: move gpio/spi to base design
2015-03-09 16:08:25 -04:00
f0395b646c
plddr3: ad_connect updates
2015-03-09 16:07:37 -04:00
031dffa80c
zc706: move gpio/spi to base design
2015-03-09 16:07:02 -04:00
2302f282d3
sys_dmafifo: ad_connect updates
2015-03-09 16:06:06 -04:00
545c0baada
kcu105: gpio led/sw merged to bd default
2015-03-09 16:05:28 -04:00
b31d9abd91
kcu105: gpio/spi moved to base design
2015-03-09 16:04:09 -04:00
ed28b47203
board: optimize interconnect for performance
2015-03-06 12:38:52 -05:00
d5eaadd872
daq2: remove ila for kcu105 ddr-300M timing
2015-03-06 12:38:08 -05:00
1db5f4696f
kcu105: isolate ddr-300M from interconnect-100M timing
2015-03-06 12:37:31 -05:00
da5b136f5a
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
0ac1676318
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
7fba7cc6e5
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
af465cbc80
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
1220b53c8c
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
75c4228987
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
605d23d3a4
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
91765fdd82
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
7bf4141a3f
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
bf1388b05e
kcu105: rev.d changes
2015-03-04 12:43:04 -05:00
4f918cdce9
2014.4.1 ultrascale updates
2015-02-26 16:10:57 -05:00
847c2e049a
kcu105: removed lutram constraints
2015-02-26 16:09:55 -05:00
1613f7fb41
cftl_cip: Add util_pmod_fmeter IP to library
...
Frequency meter IP for CN0332.
2015-02-23 17:20:12 +02:00
abde4048e0
fmcomms1: Add extra AXI slice on ADC DMA path
...
Add a extra AXI slice on the ADC DMA data path to the HP interconnect to
improve the timing.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-02-20 16:43:45 +01:00
b9d16a7eb1
scripts: renaming board parameters
2015-02-20 09:12:30 -05:00
288f5378ff
rfsom: schematic changes
2015-02-18 14:32:41 -05:00
93e2bcd911
rfsom: schematic changes
2015-02-18 14:32:30 -05:00
383cf3b3a3
rfsom: schematic changes
2015-02-18 14:32:20 -05:00
d2e9b1fe03
rfsom: schematic changes
2015-02-18 14:32:04 -05:00
3113abf038
cftl_cip: Add gpio counter for CN0332
...
Add a counter core to the design, to support the CN0332 pmod with a speed sensor.
Change a naming for the custom cores.
2015-02-18 18:24:46 +02:00
e111e1336e
conflicts-
2015-02-06 22:14:21 -05:00
2d607d765b
cftl_cip: Add a clock input to the device core, for the SPI clock.
...
This clock can be adjustable from the system_project.tcl
2015-02-04 14:55:17 +02:00
996e1b7970
rfsom: constraint updates
2015-02-03 14:20:34 -05:00
fd2ab02174
cftl_std: Added in the constraint file comments regarding supported CFTLs
2015-01-29 16:27:43 +02:00
d69d105b5d
vc707_common: Fix address mapping
...
The axi_ethernet/eth_buf/S_AXI_2TEMAC address space and axi_ethernet/eth_mac/s_axi/Reg address
segment does not exist in 2014.4.
2015-01-29 12:22:06 +02:00
e8ff30119d
vc707_xdc: Delete unnecessary clock definition
2015-01-29 11:39:10 +02:00
6c8ea24f20
common: Update VC707 base design to 2014.4
2015-01-28 16:24:52 +02:00
e1d8dd10a9
daq2: Initial check in of the VC707 based project
...
NOTE: Can not communicate with the clock chip, rx/tx PLL not locking.
2015-01-28 16:24:06 +02:00
659e0cca4e
cftl_cip: Initial check in.
...
Project cftl_cip supports the following Circuits from the Lab pmods:
+ EVAL-CN0350-PMDZ
+ EVAL-CN0335-PMDZ
+ EVAL-CN0336-PMDZ
+ EVAL-CN0337-PMDZ
Note: Additional testing needed!
2015-01-23 18:29:32 +02:00
463a3bbc88
cftl_std: Updated project. Switched to PS7 gpio. Renamed signals.
2015-01-23 14:11:33 +02:00
9672271155
fmcjestadc1: a5gt: Updated project to work with linux and fixed ethernet
...
- added phy reset mechanism for proper functioning of the ethernet
- not all DDR is accesible, as NIOS2 can't access it with MMU enabled
2015-01-23 13:30:56 +02:00
5a77ab0161
a5gt:common: Added phy reset signal from ethernet in pin assignments
2015-01-23 12:31:41 +02:00
050f17e034
a5gt3: common: corrected naming in pin assignments. added reset signal from FPGA2
2015-01-23 12:30:16 +02:00
72e89852b6
daq2/kc705: 2014.4 updates
2015-01-14 12:58:08 -05:00
024d9e7309
replace export hardware -- hwdef/sysdef
2015-01-13 13:40:21 -05:00
03988f1c9f
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:20 -05:00
b595cce697
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:18 -05:00
b0b4bfe531
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:17 -05:00
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
b9e2c5659f
fmcomms2: 2014.4
2015-01-09 14:12:54 -05:00
9e64df917c
daq2: 2014.4
2015-01-09 14:12:53 -05:00
65d9f08763
zc706: mig 2014.4
2015-01-09 14:12:52 -05:00
868df1aac8
zc706: mig 2014.4
2015-01-09 14:12:51 -05:00
0258afbadc
board: add ddr seg variable
2015-01-09 14:12:50 -05:00
22d881981e
cftl_std: Renamed cftl standard project
2015-01-09 19:44:13 +02:00
debbe31713
Merge remote-tracking branch 'origin/master' into dev
2015-01-09 11:12:56 -05:00
117686f352
ad9739a: updates for ad9739a
2015-01-09 10:54:50 -05:00
785d3a4ae3
ad9739a: updates for ad9739a
2015-01-09 10:54:40 -05:00
e8d0782a2e
ad9739a: updates for ad9739a
2015-01-09 10:54:22 -05:00
baea2090d6
ad9739a: updates for ad9739a
2015-01-09 10:54:12 -05:00
c9b6411e86
ad9739a: updates for ad9739a
2015-01-09 10:54:00 -05:00
51e6d0888a
cftl_xil_zed: Initial commit for common platform used with CFTL circuits
...
This common platform uses PS7 SPI and I2C to communicate with different chips.
On different connectors different pin configurations are supported:
- On connector JA, a spi interface and a 2 pin GPIO
- On connector JB, a I2C interface
- On connector JC, a spi interface with 2 chip selects
2015-01-09 17:47:29 +02:00
a9cc8f6c91
ad9739a_fmc: added
2015-01-08 10:35:59 -05:00
a170ebfb82
imageon: Initial commit
...
Initial commit of the IMAGEON project for ZC706. NOT tested.
2015-01-08 17:01:22 +02:00
f566268db5
zed_common: Updated common to 2014.4
2015-01-08 11:59:26 +02:00
f6df66ea06
motcon2_fmc: initial commit of the base design
...
Because vivado crashes when adding the speed detector, it's not part of this commit.
The controller is also not part of this commit
2015-01-08 11:57:22 +02:00
eb569b991d
dmafifo- remove util fifo setup
2015-01-06 16:23:14 -05:00
9e707d8a33
rfifo: wrapper updates
2015-01-06 16:17:33 -05:00
a944deebd5
wfifo: wrapper updates
2015-01-06 16:17:25 -05:00
d2baf17ff0
rfsom: updated to rfsom
2014-12-23 14:04:02 -05:00
3d1ba585ee
rfsom: updated to rfsom
2014-12-23 14:04:01 -05:00
19c2da836c
rfsom: updated to rfsom
2014-12-23 14:03:59 -05:00
61ba4f4357
rfsom: updated to rfsom
2014-12-23 14:03:58 -05:00
614dfcd93c
rfsom: updated to rfsom
2014-12-23 14:03:57 -05:00
4b571ded8f
fmcomms2/rfsom: initial commit
2014-12-23 14:03:56 -05:00
ee52602c89
rfsom: initial commit
2014-12-23 14:03:55 -05:00
8e41af7b92
fmcomms2: 2014.4 update
2014-12-23 14:03:54 -05:00
0de1a38245
zc706: 2014.4 update
2014-12-23 14:03:52 -05:00
43037a42eb
scripts: 2014.4 update
2014-12-23 14:03:51 -05:00
71baa129a7
VC707: Fixed linear flash timings
2014-12-19 15:45:14 +02:00
2ff72d60d1
fmcomms2: Updated VC707 project to fix ethernet problem
2014-12-19 15:45:05 +02:00
4a9c4cdf19
fmcadc2_zc706: Fix PLDDR fifo name
2014-12-19 13:01:33 +02:00
6230cb25b7
fmcomms7_zc706: Add constraint file for PLDDR
2014-12-19 13:01:27 +02:00
6e124c4c24
fmcomms7_zc706: Connect PLDDR rst to external push button
2014-12-19 13:01:21 +02:00
a0b83bac7f
fmcomms7_zc706: Delete trailing spaces from system top
2014-12-19 13:01:15 +02:00
362b0f5300
daq3_zc706: Add constraint file for PLDDR
2014-12-19 13:01:10 +02:00
d77e28e372
daq3_zc706: Connect PLDDR rst to external push button
2014-12-19 13:01:05 +02:00
d483801e2d
daq3_zc706: Delete trailing spaces from system_top
2014-12-19 13:00:59 +02:00
df205f5cea
fmcadc2_zc706: Connect PLDDR rst to external push button
2014-12-19 13:00:53 +02:00
8fc1f046a4
fmcadc4_zc706: Add constraint file for PLDDR
2014-12-19 13:00:48 +02:00
7ec1e282d9
daq2_zc706: Add constraint file for the PLDDR
2014-12-19 13:00:42 +02:00
a6cf615ee0
zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc
2014-12-19 13:00:35 +02:00
153a4cef18
daq2: missing sys_rst decl.
2014-12-19 13:00:21 +02:00
ad144ef06a
plddr3: sys-rst from board pushbutton
2014-12-19 13:00:07 +02:00
33a8c8a155
plddr3: sys-rst from board pushbutton
2014-12-19 13:00:01 +02:00
0cc29fe03b
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:54 +02:00
51bdcb1b12
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:48 +02:00
daba3fb72e
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:42 +02:00
758ac6bb8e
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:35 +02:00
1a9eb8196a
VC707: Fixed linear flash timings
2014-12-18 17:49:00 +02:00
23e2886b5d
fmcadc2_zc706: Fix PLDDR fifo name
2014-12-18 16:57:19 +02:00
b684c8bf33
fmcomms7_zc706: Add constraint file for PLDDR
2014-12-18 10:15:11 +02:00
ae09030044
fmcomms7_zc706: Connect PLDDR rst to external push button
2014-12-18 10:14:32 +02:00
0aa4661122
fmcomms7_zc706: Delete trailing spaces from system top
2014-12-18 10:13:16 +02:00
e81327b794
daq3_zc706: Add constraint file for PLDDR
2014-12-18 10:08:33 +02:00
8121d11993
daq3_zc706: Connect PLDDR rst to external push button
2014-12-18 10:07:52 +02:00
090aed508e
daq3_zc706: Delete trailing spaces from system_top
2014-12-18 10:06:29 +02:00
abdb59a28e
fmcadc2_zc706: Connect PLDDR rst to external push button
2014-12-18 10:04:01 +02:00
31a95042cf
fmcadc4_zc706: Add constraint file for PLDDR
2014-12-18 10:01:16 +02:00
39cc7b8b2e
daq2_zc706: Add constraint file for the PLDDR
2014-12-18 10:00:35 +02:00
59e610be09
zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc
2014-12-17 19:07:43 +02:00
656246f2ba
fmcomms2: Updated VC707 project to fix ethernet problem
2014-12-17 16:16:01 +02:00
90fe993db2
daq2: missing sys_rst decl.
2014-12-15 14:39:40 -05:00
725b407523
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:36 -05:00
7b1e3d77e8
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:25 -05:00
0a6769fda9
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:16 -05:00
f99bd3609b
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:04 -05:00
77fa96fa67
plddr3: sys-rst from board pushbutton
2014-12-15 12:58:54 -05:00
ed7f8b4908
plddr3: sys-rst from board pushbutton
2014-12-15 12:58:44 -05:00
ca36ef0e02
Merge remote-tracking branch 'origin/hdl_2014_r2' into dev
2014-12-11 11:26:30 -05:00
d82952b22a
daq2/kcu105: lane assignment fixes
2014-12-11 11:19:38 -05:00
7dddac84f1
motcon1_fmc: Fixed issue introduced by merge
2014-12-11 14:32:32 +02:00
9e8fd8ed9e
base_design: External IIC reset is connected to Vcc
...
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:14:54 +02:00
caa0268434
base_design: External IIC reset is connected to Vcc
...
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:13:07 +02:00
86ad9213e0
fmcomms2: Update c5soc system_timing script
2014-12-10 17:54:11 +02:00
6ac774a9dd
fmcjesdadc1: Update altera system_timing script
2014-12-10 17:53:29 +02:00
e7c920bbd9
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
4cf435ee39
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
8b41034825
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
842ba19aaa
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:12 -05:00
d7a6b5e6d0
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:11 -05:00
d57b6b01c6
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:10 -05:00
9103f6706e
Merge branch 'hdl_2014_r2' of https://github.com/analogdevicesinc/hdl into hdl_2014_r2
2014-12-09 17:38:37 +01:00
138e789fb6
projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
...
sys_concat_intc: don't reset NUM_PORTS to 6
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-09 17:38:16 +01:00
772edbae20
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
d149890426
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
dad0745fbe
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
987257e3c3
fmcadc4: fifo updates
2014-12-09 10:43:01 -05:00
0c6cbdd303
fmcadc4: fifo updates
2014-12-09 10:38:51 -05:00
f044ab94e0
fmcadc4: fifo updates
2014-12-09 10:38:50 -05:00
e2a9502e1e
fmcadc4: fifo updates
2014-12-09 10:38:49 -05:00
a2607a8057
fmcadc4: fifo updates
2014-12-09 10:38:47 -05:00
a6b7b9d880
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:20:39 +02:00
2e4640d5c5
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:17:46 +02:00
4d28825741
ad9467_kc705: Fix typos.
2014-12-09 13:46:51 +02:00
a0d5e7862e
ad9467_kc705: Fix typos.
2014-12-09 12:07:49 +02:00
915ee7a268
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:54:16 +02:00
ee04eb637b
ad9467_kc705: Fix interrupts
2014-12-09 11:54:08 +02:00
37c3af9929
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:51:36 +02:00
b83299c606
ad9467_kc705: Fix interrupts
2014-12-09 11:48:46 +02:00
1b4a4bc06e
daq3: compilation fixes - latest changes
2014-12-08 14:51:52 -05:00
c0d588ba8c
daq3: compilation fixes - latest changes
2014-12-08 14:51:52 -05:00
26d72d306e
daq3: compilation fixes - latest changes
2014-12-08 14:51:51 -05:00
abff7097f6
daq3: compilation fixes - latest changes
2014-12-08 14:50:03 -05:00
8a72a6a0dc
daq3: compilation fixes - latest changes
2014-12-08 14:49:52 -05:00
7c3ed75b79
daq3: compilation fixes - latest changes
2014-12-08 14:49:40 -05:00
0a8fabe874
Merge branch 'hdl_2014_r2' into dev
...
Conflicts:
projects/fmcadc5/common/fmcadc5_bd.tcl
projects/motcon1_fmc/common/motcon1_fmc_bd.tcl
projects/motcon1_fmc/zed/system_constr.xdc
projects/motcon1_fmc/zed/system_top.v
2014-12-08 11:32:13 -05:00
82b9ebe23d
remove replaced projects
2014-12-08 10:45:12 -05:00
19e4950b72
renamed to match official names
2014-12-08 10:44:15 -05:00
a558d4000d
motcon1_fmc: Added XADC to the project, the external muxing is controlled by generic GPIO, not XADC GPIO
2014-12-08 11:27:47 +02:00
d5572eaa49
ad9265_fmc: Fix unconnected DMA irq
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-12-05 17:44:47 +01:00
84174460bb
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
bb6cc40902
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
8e4d0a1b60
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
7e18162632
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:48:37 +01:00
e6e9c0058d
motor_control: Updated project to Vivado 14.2. Temporary removed XADC
...
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:53:23 +02:00
4c05e8de5d
motor_control: Updated project to Vivado 14.2. Temporary removed XADC
...
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:48:00 +02:00
11f41d1dff
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:42:28 +02:00
34ffa15b12
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:39:17 +02:00
58bc7c6886
fmcomms6: Add DMA overflow signal to ILA
...
This is useful for debugging DMA overflows.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 14:23:09 +01:00
a9c6148570
fmcomms6: Better cope with higher sample rates
...
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:56:59 +01:00
324c0528c2
fmcomms6: Better cope with higher sample rates
...
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
46156b7ceb
fmcomms6: Add DMA overflow signal to ILA
...
This is useful for debugging DMA overflows.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
3cc890e604
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:49:09 +01:00
2d8450abc4
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-12-04 09:47:46 +01:00
3bc9b25e96
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:47:02 +01:00
56a8a54080
ad9625x2_fmc: Increase the dma fifo data depth
2014-12-03 12:13:08 +02:00
757c213165
ad9625x2_fmc: Integrate the dac spi interface into the SPI interface
2014-12-03 12:06:43 +02:00
48673fec6a
ad9625x2_fmc: Integrate the dac spi interface into the SPI interface
2014-12-03 12:01:47 +02:00
80d1314c5e
ad9625x2_fmc: Reverse "Add a separate SPI for the DAC interface"
2014-12-03 10:14:09 +02:00
d89ed56e10
ad9625x2_fmc: Increase the data depth of the dmafifo
2014-12-02 19:29:19 +02:00
0007054638
ad9625x2_fmc: Add a separate SPI for the DAC interface
...
DAC spi interface is controlled by an axi_spi core.
Modifications on GPIO layout: pwr_good is 12, vdither 13 and trig is 14.
2014-12-02 19:29:18 +02:00
805d52346c
fmcomms7: compilation fixes on plddr3
2014-12-02 10:39:01 -05:00
f01d1aae2d
fmcomms7: compilation fixes on plddr3
2014-12-02 10:38:44 -05:00
95e113e1a3
fmcomms6: Connect DMA directly to the HP port
...
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
45fc7bb7e2
fmcomms6: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
5b68b79dec
ad9467_fmc: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
d773673e4f
fmcomms6: Connect DMA directly to the HP port
...
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:09 +01:00
5169d3ef59
fmcomms6: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:09 +01:00
3c85c7e2f8
ad9467_fmc: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:08 +01:00
7a55db59f6
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:19:08 +02:00
d5422c2ecc
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:17:09 +02:00
d5a1df2fe6
usdrx1_zc706: Update interrupts.
2014-11-27 14:06:13 +02:00
eed1981ede
usdrx1_fmc: Fix GT lane number definition.
2014-11-27 14:05:54 +02:00
a576f7dc98
ad9671_zc706: Update interrupts
2014-11-27 14:05:43 +02:00
0ccc546aeb
ad9671_fmc: Fix GT lane number definition
2014-11-27 14:05:34 +02:00
ee7d427123
ad9671_fmc: Cosmetic changes
...
Delete trailing whitespaces.
2014-11-27 14:05:24 +02:00
4ea86de4db
usdrx1_zc706: Update interrupts.
2014-11-27 14:03:54 +02:00
d1af4d2951
usdrx1_fmc: Fix GT lane number definition.
2014-11-27 14:03:10 +02:00
82561b48cc
ad9671_zc706: Update interrupts
2014-11-27 14:02:18 +02:00
92f85086e3
ad9671_fmc: Fix GT lane number definition
2014-11-27 14:01:36 +02:00
98e8f21c1d
ad9671_fmc: Cosmetic changes
...
Delete trailing whitespaces.
2014-11-27 14:00:35 +02:00
419d38b9f6
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:38:41 +02:00
6fd2f8c913
daq2_fmc: Update interrupts
...
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 15:38:24 +02:00
bfd89dc9c7
daq2_kc705: Fix constraint file
...
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 15:38:10 +02:00
630f26442a
daq2_kc705: Instantiate dmafifo module
2014-11-26 15:37:57 +02:00
00c7b23b21
daq2_fmc: Cosmetic changes
...
Delete trailing whitespaces, no functional changes.
2014-11-26 15:37:48 +02:00
12f1873e17
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:08:55 +02:00
8dad54b6e3
daq2_fmc: Update interrupts
...
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 13:53:18 +02:00
4b6968c2af
daq2_kc705: Fix constraint file
...
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 13:51:46 +02:00
14193cf4bd
daq2_kc705: Instantiate dmafifo module
2014-11-26 13:50:42 +02:00
f28845cc0d
daq2_fmc: Cosmetic changes
...
Delete trailing whitespaces, no functional changes.
2014-11-26 13:48:48 +02:00
199e86d715
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:47:16 +02:00
03751827cb
fmcomms2: Updated vc707 project
...
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:47:06 +02:00
40c5816bd7
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:46:53 +02:00
84052ad437
Add Vivado version check to adi_project_create
...
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.
By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.
Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-26 10:46:34 +01:00
303a2683a2
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:26:58 +02:00
6227bc82c0
fmcomms2: Updated vc707 project
...
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:25:19 +02:00
2f77daf71d
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:21:20 +02:00
626b719ad8
ad6676ebv_vc707: Update the interrupts
2014-11-26 10:56:47 +02:00
322324b891
ad6676evb_vc707: Add support for linear flash
2014-11-26 10:56:36 +02:00
67f82c9e3e
ad6676_fmc: Fix GT lane number definition
2014-11-26 10:56:23 +02:00
5e70ef4ab9
ad6676ebv_vc707: Update the interrupts
2014-11-26 10:49:14 +02:00
72f9dd226a
ad6676evb_vc707: Add support for linear flash
2014-11-26 10:48:27 +02:00
d75487d0a2
ad6676_fmc: Fix GT lane number definition
2014-11-26 10:45:00 +02:00
81f0e417d4
Add Vivado version check to adi_project_create
...
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.
By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.
Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-25 18:35:11 +01:00
2e72a2cc0c
fmcomms1: Updated VC707 project with latest interrupts and linear flash. Fixed constraints and constraint priority
2014-11-25 15:00:00 +02:00
dbc9da8598
fmcomms1: Updated KC705 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:56:22 +02:00
87324d8a14
fmcomms1: Updated AC701 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:54:01 +02:00
b8ab2ff847
fmcomms1: updated common project
...
- increased the DMA FIFOs to 64
- added axi slices to the source and destination for DMAs
- for microblaze systems, increade the ad9643 dma data width at destination
- removed sys_fmc_dma_clk and used the sys_200m_clk instead for DMA data transfer
2014-11-25 14:51:42 +02:00
2bd154ad59
xfest14_zed: Update project to 2014.2
2014-11-25 12:53:42 +02:00
a1e67a5912
ad9625x2_fmc: dmafifo address width now is an argument of the process
2014-11-24 19:22:18 +02:00
660424ef99
fmcomms6_fmc: Update interrupts
2014-11-24 18:23:35 +02:00
56aefb62ed
fmcomms6_fmc: Cosmetic changes
...
Delete trailing white spaces, and fix alignment.
2014-11-24 18:23:34 +02:00
68ac015825
daq1_fmcl: Fix GT lane number definitions
...
Update which fix issues caused by GT lane number parameters change. (commit f8e7796592
2014-11-24 18:23:33 +02:00
0ecfc14e95
daq1_fmc: Update interrupts.
2014-11-24 18:23:32 +02:00
9b104f1657
daq1_fmc: Get rid of the concat module inside the block design.
...
xl_concat just causing troubles, no need to use it, if not justified.
2014-11-24 18:23:30 +02:00
64b4d0177e
ad9467_zed: Using ad_iobuf module for IO buffer instantiations on top
...
No functional changes, we just try to keep consistency.
2014-11-24 18:23:29 +02:00
83c2eefea2
ad9467_fmc: Update interrupts
2014-11-24 18:23:28 +02:00
114406335d
ad9467_fmc: Connect dma controller directly to the HP port
2014-11-24 18:23:27 +02:00
67065a3130
ad9680_eval: removed
2014-11-24 11:04:34 -05:00
76fb5d3da9
ad9625_vc707: dmafifo address width now is an argument of the process
2014-11-24 16:52:10 +02:00
1834cf6d38
adi_prcfg_project: Update the PR design flow
...
Optimization directive kept on default in the implementation flow.
2014-11-21 19:26:33 +02:00
83d79a6acf
fmcomms2_pr: Update system_project script for mitx
...
Bist logic is using the pnmon module for PRBS checking.
2014-11-21 19:23:12 +02:00
6517a94929
fmcomms2_pr: Update interrupts and iobuf
...
No functional changes, update to the new interrupt path, and change the
iobuf instantiation in order to keep consistency.
2014-11-21 19:22:03 +02:00
65588f1b67
fmcomms2_pr: Cosmetic changes of mitx system top.
2014-11-21 19:20:30 +02:00
84f8377beb
fmcjedadc1_vc707: Add support for linear flash interface
2014-11-21 19:19:21 +02:00
e8546b9c3b
fmcjesdadc1: Update interrupts for KC705 and VC707
2014-11-21 19:18:30 +02:00
b0f571ce0c
fmcjesdadc1: Fix parameter lane number for GT core
2014-11-21 19:17:29 +02:00
c0f4d7e2b5
mitx045_common: Definition file patch
...
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.
NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
Rejeesh Kutty
Istvan Csomortani
Adrian Costina
Lars-Peter Clausen
Michael Hennerich
Paul Cercueil