aa0ea252ec
fmcomms5: constrain ref clock
2019-05-30 14:55:11 +03:00
4b13274c55
ad9361/all/system_constr.xdc: remove manual clock definition
...
Having a clock assigned manually to the clk output pin of the axi_ad9361
let the Vivado timing engine to not ignore the clock insertion delay when
analyzing paths between clk_0 and the manually created clock that has
the same source (clk_0), resulting in timing failure.
2019-04-12 10:48:50 +03:00
6cee492d96
fmcomms5/zc702- pmods as gpios
2017-08-09 14:07:58 -04:00
d7e87a60a9
Remove executable flag from non-executable files
...
All of these files are source code and are not executable standalone.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-07-28 17:56:07 +02:00
3bc9df4c51
fmcomms5: Fixed the wornings created by TDD missing connections to axi_ad9361 core
2016-12-07 21:43:19 +02:00
0ade2a5f67
fmcomms5: Updated project to vivado 2014.2. Updated interrupt system. Fixed constraints
2014-11-07 13:45:15 +02:00
a49eb5853b
ZED, ZC702: Added contraints so that projects can successfully synthesize on linux systems
...
For ZC706 Fixed one constraint which was not correct
2014-08-26 16:28:41 +03:00
9cdd4107cd
fmcomms5: ZC702: add reset_b and fixed system_top
2014-07-25 15:24:11 +03:00
9a36075324
moved fmcomms5
2014-05-19 13:49:49 -04:00
Laszlo Nagy
Rejeesh Kutty
Lars-Peter Clausen
AndreiGrozav
Adrian Costina