Rejeesh Kutty
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67df6b3ea8
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a10gx- disable lab cell on dsp input register
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2015-06-19 14:32:54 -04:00 |
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Rejeesh Kutty
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f587aa42d9
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a10gx- tx sync
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2015-06-10 14:32:25 -04:00 |
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Rejeesh Kutty
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00b8c171b8
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a10gx: pll locked to reset controller
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2015-06-08 15:00:11 -04:00 |
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Rejeesh Kutty
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f81d22a17a
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altera- common timing check
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2015-06-04 10:56:32 -04:00 |
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Rejeesh Kutty
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d111692608
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daq2/a10gx- ddr-ref @133
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2015-06-04 10:53:16 -04:00 |
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Rejeesh Kutty
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4a701d3895
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a10gx- no-ddr
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2015-06-01 11:00:02 -04:00 |
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Rejeesh Kutty
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ad3198f623
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a10gx: top level fixes
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2015-05-21 14:06:15 -04:00 |
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Rejeesh Kutty
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19b094cab5
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daq2/a10gx- added jesd align
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2015-05-20 15:39:27 -04:00 |
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Rejeesh Kutty
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f1c30ac225
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daq2/a10gx- qsys updates
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2015-05-20 14:24:49 -04:00 |
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Rejeesh Kutty
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52b6077a46
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a10gx- 15.0 updates
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2015-05-19 15:12:23 -04:00 |
Adrian Costina
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c19749361d
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Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
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2015-05-18 17:22:46 +03:00 |
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Rejeesh Kutty
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672a5a4dfa
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a10gx- updates
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2015-05-14 14:35:43 -04:00 |
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Rejeesh Kutty
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848dac70d5
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a10gx: updates--
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2015-05-11 11:56:27 -04:00 |
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Rejeesh Kutty
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dc0eea5f0f
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a10gx: updates--
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2015-05-11 11:56:26 -04:00 |
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Rejeesh Kutty
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bdc3f3d807
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a10gx: updates--
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2015-05-11 11:56:24 -04:00 |
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Rejeesh Kutty
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75e055dab9
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daq2/a10gx- initial commit
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2015-05-11 11:56:23 -04:00 |