pluto_hdl_adi

Commit Graph

Author	SHA1	Message	Date
Iulia Moldovan	0c0617d49e	libraries: Update modules according to guideline * Added header license for the files that didn't have * Modified parentheses * Removed extra spaces at the end of lines * Fixed parameters list to be each parameter on its line * Deleted lines after endmodule and consecutive empty lines * Fixed indentation Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>	2022-06-28 18:06:56 +03:00
Laszlo Nagy	94181206c2	jesd204/tb: Update testbenches	2021-02-05 15:24:15 +02:00
Matt Blanton	400c3927f7	jesd204: Add support for 8-byte JESD204B, frame alignment character insertion/replacement Add support to JESD204 RX and TX core for 8-byte 8b/10b link mode, and frame alignment character replace/insert with or without scrambling. Add support for xcelium simulator to jesd204/tb Increased cores minor version.	2021-02-05 15:24:15 +02:00

Author

SHA1

Message

Date

Iulia Moldovan

0c0617d49e

libraries: Update modules according to guideline

* Added header license for the files that didn't have
* Modified parentheses
* Removed extra spaces at the end of lines
* Fixed parameters list to be each parameter on its line
* Deleted lines after endmodule and consecutive empty lines
* Fixed indentation

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>

2022-06-28 18:06:56 +03:00

Laszlo Nagy

94181206c2

jesd204/tb: Update testbenches

2021-02-05 15:24:15 +02:00

Matt Blanton

400c3927f7

jesd204: Add support for 8-byte JESD204B, frame alignment character insertion/replacement

Add support to JESD204 RX and TX core for 8-byte 8b/10b link mode,
and frame alignment character replace/insert with or without scrambling.
Add support for xcelium simulator to jesd204/tb
Increased cores minor version.

2021-02-05 15:24:15 +02:00

3 Commits (3f0a487b2e8f7425206bed310c45f2f313dee2b8)