Commit Graph

2 Commits (41542213f6cd82beccca07ff1ad58e122d2bfb01)

Author SHA1 Message Date
Iulia Moldovan 68461110aa Replace link in license header from master to main
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2024-01-16 16:48:45 +02:00
AndreiGrozav f8ee407f34 axi_ad4858: Initial commit
The axi_ad4858 IP core is design as the HDL interface for the AD4858 ADC.
Features:
 - AXI based configuration
 - LVDS and CMOS support
 - Configurable number of active data lines (CMOS - build-time configurable)
 - Oversampling support
 - Supports packet formats 0,1,2 or 3
 - CRC check support
 - Real-time data header access
 - Channel based raw data access(0x0408)
 - Xilinx devices compatible

Documentation at https://wiki.analog.com/resources/fpga/docs/axi_ad4858
2023-10-05 10:19:03 +03:00