Iulia Moldovan
|
68461110aa
|
Replace link in license header from master to main
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
|
2024-01-16 16:48:45 +02:00 |
laurentiu_popa
|
cf4d2b5a6f
|
projects/ad4134_fmc: Add FMC pinout descripton
* Added txt description of all FMC pins used/unused
* Updated constraint files with FMC pinout location
Signed-off-by: laurentiu_popa <Laurentiu.Popa@analog.com>
|
2023-10-19 13:55:30 +03:00 |
|
Iulia Moldovan
|
c9a7d4d927
|
Add copyright and license to .tcl, .ttcl files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
|
2023-07-25 15:22:26 +03:00 |
|
Iulia Moldovan
|
1cac2d82e1
|
Add copyright and license to .xdc files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
|
2023-07-25 11:03:02 +03:00 |
|
Iulia Moldovan
|
28c06d505f
|
Add/edit copyright and license for .v, .sv files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
|
2023-07-11 15:17:41 +03:00 |
|
laurent-19
|
2ae09c9808
|
Check guidelines. Remove redundancies
* Removed empty/commented lines
* Regenerated Makefiles
* Removed redundancies adc channels data width
* Set data width 32-bit: max resolution and CRC header
Signed-off-by: laurent-19 <laurentiu.popa@analog.com>
|
2023-03-29 15:08:07 +03:00 |
Stanca Pop
|
ee30c64923
|
projects/ad4134_fmc: Initial commit add support
* Updated reference design: spi trigger, ODR parameters
- enabled ext_clk for PWM to use 96 MHz spi clk
- mofified PWM channels used:
- ch1: ODR - 850 ns period, 130 ns high time
==> max fODR = 1.18 MHz
- ch0: trigger - 850 ns period, 30 phase shift
==> 10 ns between falling ODR rising DCLK
- spi offload trigger signal: PWM trigger used
* Moved mem_interconnect to hp1
* Added dclkio GPIO
* Updated bd SPIE hierarchy, see library/spi_engine.tcl
Signed-off-by: laurent-19 <laurentiu.popa@analog.com>
|
2023-03-29 15:08:07 +03:00 |