zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
6,562 Commits
1 Branch
0 Tags
23 MiB
Commit Graph

11 Commits (41542213f6cd82beccca07ff1ad58e122d2bfb01)

Author SHA1 Message Date
Iulia Moldovan c9a7d4d927 Add copyright and license to .tcl, .ttcl files 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-07-25 15:22:26 +03:00
Bogdan Luncan 80fe536863 ad9081/vck190/system_project: Change the default profile 
ADC Mode 26: L=8, M=8, S=2, NP=12, LaneRate=24.75 GSPS
DAC Mode 24: L=8, M=8, S=2, NP=12, LaneRate=24.75 GSPS

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
 2023-05-16 12:13:55 +03:00
Bogdan Luncan e1af7837da ad9081: Parameters and header update 
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
 2023-05-10 12:59:58 +03:00
Bogdan Luncan 73af87a324 ad9081: Versal transceiver update 
- Remove 4 lane limitation
- Adds support for RX or TX only instantiation

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
 2023-05-10 12:59:58 +03:00
Bogdan Luncan 72313df81f Updated the makefiles to build the projects in subdirectories based on the build parameters. 
Running 'make' will build the default project directly in the project folder (like it did before)
Running 'make RX_LANE_RATE=15 TX_LANE_RATE=15' will build the project inside the 'RXRATE15_TXRATE15' subdirectory.
Running 'make CFG=cfg/test_config.txt" will use the variables found inside the configuration file and build the project inside the 'test_config' subdirectory.
Running 'make clean' will clean the default project only.
Running 'make CFG=cfg/test_config.txt clean' will clean the 'testconfig' build.
Running 'make clean-all' will delete all the built configurations and libraries.

Note that the 'JESD' and 'LANE' words from the parameter names are stripped.

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
 2022-11-14 09:38:42 +02:00
LIacob106 158c10df34 projects: starndadize the jesd make parameters 2022-09-13 11:53:21 +03:00
Iacob_Liviu 482f0489a3 scripts: Merge adi_env.tcl into a single file 
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
 2022-08-08 13:52:54 +03:00
Laszlo Nagy d48b1bcdce ad9081_fmca_ebz/vck190: Expose ref clock parameter 2022-08-04 09:52:57 +03:00
Laszlo Nagy 8df1d8eade ad9081_fmca_ebz: Update parameter description 2022-03-11 13:16:22 +02:00
Laszlo Nagy 1d951cfbae ad9081_fmca_ebz/vck190: Change default profile to 2 lanes 2021-11-19 14:01:48 +02:00
Laszlo Nagy 8d547f31e1 ad9081_fmca_ebz/vck190: Initial version 2021-10-05 14:09:51 +03:00