Lars-Peter Clausen
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d7e87a60a9
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Remove executable flag from non-executable files
All of these files are source code and are not executable standalone.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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2017-07-28 17:56:07 +02:00 |
Adrian Costina
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5a98e727f2
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A10GX: Update DDR3 configuration
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2017-07-27 12:38:14 +01:00 |
Rejeesh Kutty
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0bd22e78d9
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altera- adi-project-create version
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2017-06-05 15:24:35 -04:00 |
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Rejeesh Kutty
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cfcb269d38
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a10gx- change ddr to 1G
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2017-05-15 09:32:36 -04:00 |
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Rejeesh Kutty
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ebeebdddf0
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altera- infer latest versions
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2017-05-12 13:40:14 -04:00 |
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Rejeesh Kutty
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c728299e71
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altera- default to latest version
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2017-05-12 13:25:17 -04:00 |
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Rejeesh Kutty
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b3f06af77a
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altera srf files do not work
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2017-03-22 09:25:50 -04:00 |
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Rejeesh Kutty
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2e22ce3b62
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a10gx- ignore preliminary timing model warnings
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2017-03-21 10:52:28 -04:00 |
AndreiGrozav
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c1be17a3af
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Altera a10 devices: disable warnings regarding unused channels
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2017-03-01 11:32:17 +02:00 |
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Rejeesh Kutty
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50552ce7d6
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adrv9371x- altera updates
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2016-10-27 09:25:00 -04:00 |
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Adrian Costina
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0d095f5da9
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a10gx: Added system_type variable in common design
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2016-09-08 11:29:14 +03:00 |
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Rejeesh Kutty
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917da79da1
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altera- source defaults for qsys-script
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2016-08-30 11:50:36 -04:00 |
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Rejeesh Kutty
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c6f4def93d
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altera- make mmu a make switch
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2016-08-08 11:54:51 -04:00 |
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Adrian Costina
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52ae3ddd6c
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a10gx: Updated common files to 16.0
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2016-08-01 15:08:12 +03:00 |
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Adrian Costina
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c6c3622816
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a10gx: Updated common design adding explicit clock frequency and synchronous reset deassertion
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2016-06-30 10:59:29 +03:00 |
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Rejeesh Kutty
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625052f46e
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daq2/a10gx- qsys updates
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2016-06-07 12:28:04 -04:00 |
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Rejeesh Kutty
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d53b06849e
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daq2/a10gx- qsys updates
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2016-06-07 12:28:04 -04:00 |
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Rejeesh Kutty
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3516ec28b7
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daq2/a10gx- qsys updates
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2016-06-07 12:28:04 -04:00 |
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Rejeesh Kutty
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39d23032f1
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daq2- qsys updates
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2016-05-23 10:55:44 -04:00 |
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Adrian Costina
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72151bb1a6
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a10gx: Updated base design to include MMU
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2016-05-13 18:44:41 +03:00 |
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Rejeesh Kutty
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8b2542b181
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daq2/a10gx: 10AX115S3F45E2SGE3 version
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2016-04-20 16:01:12 -04:00 |
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AndreiGrozav
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679d471d75
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Merge branch 'hdl_2016_r1' into dev
hdl_2016_r1 contains IP core upgrades to Vivado 2015.4.2 and hdmi_tx improvements.
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2016-04-19 18:05:50 +03:00 |
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Adrian Costina
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657144d9a7
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a10gx: Updated base design and DAQ2 to the new revision of the a10gx board
- tried using ATX PLL and fPLL for TX transceiver clocks, but could not get them to lock
- CMU PLL works correctly as temporary solution
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2016-03-28 13:21:36 +03:00 |
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Adrian Costina
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377461e0d4
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Merge branch 'hdl_2015_r2' into dev
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2016-02-19 14:15:27 +02:00 |
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Adrian Costina
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ad9ecbbbb6
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daq2: Updated a10gx project to quartus 15.1.1
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2016-02-05 17:43:05 +02:00 |
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Rejeesh Kutty
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650d426301
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a10gx/base: set gpio to 32
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2015-12-11 10:14:37 -05:00 |
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Rejeesh Kutty
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f1b6577447
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a10gx/base: separate gpio in/out
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2015-12-10 16:04:54 -05:00 |
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Adrian Costina
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83399ef6ee
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a10gx: Updated common project to work with Linux (enabled MMU)
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2015-11-04 13:35:52 +02:00 |
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Rejeesh Kutty
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01c0fdc809
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daq2/a10gx- ethernet fix
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2015-09-02 14:31:15 -04:00 |
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Rejeesh Kutty
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e760aa424a
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daq2/a10gx-- intmem to ddr
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2015-08-19 13:26:38 -04:00 |
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Rejeesh Kutty
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8cc3aa0865
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ddr- 933/233
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2015-08-19 13:26:38 -04:00 |
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Rejeesh Kutty
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08e46c5ff2
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a10gx-base: data-master connections
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2015-07-21 10:53:54 -04:00 |
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Rejeesh Kutty
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a87b8fbf94
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a10gx- base system only
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2015-07-20 09:29:30 -04:00 |
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Rejeesh Kutty
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1f7745610e
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daq2- ddr updates
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2015-07-14 12:46:52 -04:00 |
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Rejeesh Kutty
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d111692608
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daq2/a10gx- ddr-ref @133
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2015-06-04 10:53:16 -04:00 |
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Rejeesh Kutty
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aa24c442f5
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a10gx- no-ddr
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2015-06-01 11:00:01 -04:00 |
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Rejeesh Kutty
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a6cae6b477
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iobuf: do is a system verilog keyword
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2015-05-21 14:06:17 -04:00 |
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Rejeesh Kutty
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b311b9dac6
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a10gx- updates
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2015-05-14 14:35:42 -04:00 |
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Rejeesh Kutty
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515dfd88d4
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a10gx- added
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2015-05-11 11:56:22 -04:00 |