15c3c96512
ad9361- clkdiv to util_ad9361_divclk
2017-08-07 11:25:55 -04:00
d0503536a8
adrv936x- bd.tcl in data flow format
2017-08-04 13:48:22 -04:00
7cdb11cc34
axi_ad9361: Update the PPS receiver module
...
+ Add a HDL parameter for the PPS receiver module :
PPS_RECEIVER_ENABLE. By default the module is disabled.
+ Add the CMOS_OR_LVDS_N and PPS_RECEIVER_ENABLE into the CONFIG
register
+ Define a pps_status read only register, which will be asserted, if the free
running counter reach a certain fixed threshold. (2^28) The register can
be deasserted by an incomming PPS only.
2017-08-02 16:38:23 +01:00
19015a8199
adrv9361x/- ps_intr_11 used for pps
2017-07-31 09:00:44 -04:00
be5f2ad80f
adrv9361z7035: Connect the gps_pps signal to the receiver
2017-07-28 08:03:33 +01:00
8c60a2a850
rfsom/ccbox- rtc int
2017-07-20 09:22:45 -04:00
becc3e8628
rfsom/ccbox- tsw updates
2017-07-18 13:51:37 -04:00
b7ca17f02b
scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects
2017-06-07 12:06:50 +03:00
84b2ad51e2
license: Add some clarification to the header license
2017-05-31 18:18:56 +03:00
85ebd3ca01
license: Update license terms in hdl source files
...
Fix a few gramatical error, fix the path of the top level license
files.
2017-05-29 09:55:41 +03:00
3af00dc520
adrv9361z7035: Update README
2017-05-25 17:47:19 +03:00
26822af7e1
adrv9361z7035: Rename pzsdr2 to adrv9361z7035
2017-05-25 17:17:54 +03:00
Rejeesh Kutty
Istvan Csomortani
Adrian Costina