439cbecf7c
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:26 -05:00
b96a8d01c3
fmcomms7: asymmetric no of lanes
2014-11-11 08:54:25 -05:00
64ec633438
gt: asymmetric no of lanes
2014-11-11 08:54:24 -05:00
97fa063341
fmcadc3: Fix pre-processing of ADC data
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Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-11 11:49:40 +01:00
4ccece5c8d
fmcadc3: Add a chip-select decoder to support up to 7 devices
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This is required for the fmcadc3 board as it features 7 chips all
connected to the same SPI bus (ad9528, ad9234 x2, ada4961 x4).
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-11 11:49:40 +01:00
05ed98f884
common: Updated common constratins for ac701, kc705, vc707, zc702
2014-11-11 12:35:44 +02:00
c1268f089d
scripts: hp/mem updates
2014-11-10 15:06:20 -05:00
3211964c2e
ad6676evb: added
2014-11-10 13:41:01 -05:00
cb15567a56
ad6676: added
2014-11-10 13:36:07 -05:00
4c0d053055
fmcomms7: compilation fixes
2014-11-10 13:26:28 -05:00
b85c552e43
fmcomms7: constraint updates
2014-11-10 13:26:27 -05:00
87000d7a23
fmcomms7: board updates
2014-11-10 13:26:26 -05:00
82048866dd
fmcomms7: initial updates
2014-11-10 13:26:25 -05:00
c72a04cecf
fmcomms7: initial updates
2014-11-10 13:26:24 -05:00
4d915d539f
fmcomms7: initial updates
2014-11-10 13:26:23 -05:00
0560bd5f99
fmcomms7: initial updates
2014-11-10 13:26:21 -05:00
cbcdf4a2aa
fmcomms7: initial updates
2014-11-10 13:26:20 -05:00
1edef2b8ff
fmcomms7: initial updates
2014-11-10 13:26:19 -05:00
12896c7624
fmcomms7: daq2 copy
2014-11-10 13:26:18 -05:00
50ce2e30be
daq2: ila changes for kcu105 timing
2014-11-10 10:57:35 -05:00
1d73adcbc4
fmcadc3: zc706: Allow to enable pairs of channels and sign-extend data
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Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-07 18:09:00 +01:00
c33d3dd0af
fmcadc3: zc706: Connect DMA interrupt line
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Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-07 18:08:24 +01:00
ad08c62b36
fmcomms2: Updated zc702 project. Updated interrupts. Updated constraints
2014-11-07 14:01:55 +02:00
4e11e39956
fmcomms2: Updated zed project
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- Updated interrupt system to the latest implementation
- Fixed constraints
2014-11-07 13:59:46 +02:00
962df53946
fmcomms2: Updated kc705 project to vivado 2014.2.
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- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
2014-11-07 13:58:40 +02:00
db18ed4af2
fmcomms2: Updated ac701 project to vivado 2014.2.
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- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
2014-11-07 13:56:00 +02:00
7e2a9ce569
fmcomms2: Updated base design interrupt system for microblaze
2014-11-07 13:54:43 +02:00
0ade2a5f67
fmcomms5: Updated project to vivado 2014.2. Updated interrupt system. Fixed constraints
2014-11-07 13:45:15 +02:00
2d9a529ab8
kcu105: ddr - 800M
2014-11-06 16:50:37 -05:00
abad8ddc28
ad9625x2: fix ila connection
2014-11-06 14:22:46 -05:00
a2a2552c60
ad9625_vc707: Update project to support linear flash interface
2014-11-06 15:01:58 +02:00
d55ddc4da5
ad9625_vc707: Delete SEG_axi_bram_ctl_mem memory segment
2014-11-06 15:01:12 +02:00
0ffb1095d9
Revert "ad9625_vc707: Fix source file definition"
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This reverts commit 6c80d88a0c
2014-11-06 14:59:08 +02:00
6b7fccf56b
ad9625_fmc: Preserve the IRQ layout
2014-11-06 12:20:26 +02:00
c6df568a00
Revert "ad_interrupts: Initial check in."
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This reverts commit b254380338
2014-11-06 12:16:52 +02:00
b11d80ed98
ad_rst: changed to dual stage
2014-11-05 16:48:02 -05:00
74ec396b27
ad_rst: ultrascale -dual stage
2014-11-05 16:47:41 -05:00
0425202da5
fmcadc3: compilation fixes
2014-11-05 11:59:10 -05:00
d69ccebbde
ad9234: full 16bit samples
2014-11-05 11:59:08 -05:00
fcd015305c
ad9625x2_fmc: Updated vc707 project to include linear flash
2014-11-05 17:19:35 +02:00
4634a4f868
vc707: Added linear flash to the base design
2014-11-05 17:18:40 +02:00
f1c5173a12
motor_control: Renamed the project to motcon1_fmc
2014-11-05 09:51:18 +02:00
0f1bc27e27
fmcadc3: Connect adc_dwr and dma_ready to ILAs
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Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-04 18:09:30 +01:00
d7ba7a95a6
fmcadc3: Update to use latest DDR3_fifo IP
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Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-04 18:09:30 +01:00
6c80d88a0c
ad9625_vc707: Fix source file definition
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The project using "p_sys_dmafifo" process, from sys_axi_dmafifo.tcl.
2014-11-04 15:21:25 +02:00
80646a641b
ad9625x2_fmc: constraints order changes
2014-11-03 15:02:35 -05:00
56e65f5926
ad9625x2_fmc: add dma fifo
2014-11-03 15:02:00 -05:00
8c0782cb74
ad9625x2_fmc: constraints changes
2014-11-03 15:01:40 -05:00
beee377fb7
ad9625x2_fmc: interrupts fix
2014-11-03 15:01:15 -05:00
8e6cb2bad4
ad9625x2_fmc: dma fifo additions
2014-11-03 15:00:51 -05:00
Rejeesh Kutty
Paul Cercueil
Adrian Costina
Istvan Csomortani
acozma