Commit Graph

33 Commits (43f460e7444a676dff7fa1d43473c775f4d3496f)

Author SHA1 Message Date
Lars-Peter Clausen d7e87a60a9 Remove executable flag from non-executable files
All of these files are source code and are not executable standalone.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-07-28 17:56:07 +02:00
Lars-Peter Clausen bb0021a926 common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment
There is no need for the audio clock to be phase aligned to its source
clock. When phase alignment is disabled the MMCM uses an internal feedback
path without requiring external resources, so disable it.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-20 18:12:24 +02:00
Lars-Peter Clausen bfcc3696e4 common: zed/zc702/zc706/mitx045: Set audio clkgen clock source type
Depending on the configuration of the clock source type of the input clock
the clocking wizard will instantiate all kinds of buffers on the input
clock signal.

For these particular projects there is no need to add any kind of buffer
since the source is already coming from a global clock buffer.  So set the
configuration accordingly.

Avoids the following warning:
	[Opt 31-32] Removing redundant IBUF since it is not being driven by a
	top-level port. i_system_wrapper/system_i/sys_audio_clkgen/inst/clkin1_ibufg
	Resolution: The tool has removed redundant IBUF. To resolve this
	warning, check for redundant IBUF in the input design.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-20 18:12:24 +02:00
Lars-Peter Clausen 23ccc66f22 common: zc702/zc706/mitx045: audio_clkgen: Infer input clock frequency
Instead of manually specifying the input clock frequency let the core infer
it automatically. This makes it more straight forward to change the clock
frequency.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-20 18:12:24 +02:00
Adrian Costina 20672a3a8b mitx045: ip automatic version update 2017-04-14 17:46:25 +03:00
AndreiGrozav 2e59f377e1 version_upgrade: Update ac701, mitx045 and zed common design to Vivado 2016.2 2016-08-29 09:50:46 +03:00
AndreiGrozav bcf5bd8137 mitx045: Updated common design to 2015.4 2016-03-15 15:18:31 +02:00
Istvan Csomortani 1ecd615f92 common/mitx045 : Fix the vdma interface of axi_hdmi_core 2015-09-02 16:33:30 +03:00
Istvan Csomortani 203d7cb470 projects/common: Cosmetic changes. 2015-08-25 09:58:32 +03:00
Istvan Csomortani af8a48d90e projects: Fix broken parameters at the common block designs.
Fix parameter names for axi_spdif_tx and axi_i2s_adi core instantiations.
2015-08-25 09:25:24 +03:00
Istvan Csomortani 57cfb7cfb1 hdl/library: Update the IP parameters
The following IP parameters were renamed:

PCORE_ID --> ID
PCORE_DEVTYPE --> DEVICE_TYPE
PCORE_IODELAY_GROUP --> IO_DELAY_GROUP
CH_DW --> CHANNEL_DATA_WIDTH
CH_CNT --> NUM_OF_CHANNELS
PCORE_BUFTYPE --> DEVICE_TYPE
PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE
CHID --> CHANNEL_ID
PCORE_DEVICE_TYPE --> DEVICE_TYPE
PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N
PCORE_SERDES_DDR_N --> SERDES_DDR_N
PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE
DP_DISABLE --> DATAPATH_DISABLE
PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE
C_BIG_ENDIAN --> BIG_ENDIAN
C_M_DATA_WIDTH --> MASTER_DATA_WIDTH
C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH
NUM_CHANNELS --> NUM_OF_CHANNELS
CHANNELS --> NUM_OF_CHANNELS
PCORE_4L_2L_N -->QUAD_OR_DUAL_N
C_ADDRESS_WIDTH --> ADDRESS_WIDTH
C_DATA_WIDTH --> DATA_WIDTH
C_CLKS_ASYNC --> CLKS_ASYNC
PCORE_QUAD_DUAL_N --> QUAD_DUAL_N
NUM_CS --> NUM_OF_CS
PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID
PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID
PCORE_CLK0_DIV --> CLK0_DIV
PCORE_CLK1_DIV --> CLK1_DIV
PCORE_CLKIN_PERIOD --> CLKIN_PERIOD
PCORE_VCO_DIV --> VCO_DIV
PCORE_Cr_Cb_N --> CR_CB_N
PCORE_VCO_MUL --> VCO_MUL
PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC
PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH
PCORE_ADDR_WIDTH --> ADDRESS_WIDTH
DADATA_WIDTH --> DATA_WIDTH
NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS
DEBOUNCER_LEN --> DEBOUNCER_LENGTH
ADDR_WIDTH --> ADDRESS_WIDTH
C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED
Cr_Cb_N --> CR_CB_N
ADDATA_WIDTH --> ADC_DATA_WIDTH
BUFTYPE --> DEVICE_TYPE
NUM_BITS --> NUM_OF_BITS
WIDTH_A --> A_DATA_WIDTH
WIDTH_B --> B_DATA_WIDTH
CH_OCNT --> NUM_OF_CHANNELS_O
M_CNT --> NUM_OF_CHANNELS_M
P_CNT --> NUM_OF_CHANNELS_P
CH_ICNT --> NUM_OF_CHANNELS_I
CH_MCNT --> NUM_OF_CHANNELS_M
4L_2L_N --> QUAD_OR_DUAL_N
SPI_CLK_ASYNC --> ASYNC_SPI_CLK
MMCM_BUFIO_N --> MMCM_OR_BUFIO_N
SERDES_DDR_N --> SERDES_OR_DDR_N
CLK_ASYNC --> ASYNC_CLK
CLKS_ASYNC --> ASYNC_CLK
SERDES --> SERDES_OR_DDR_N
GTH_GTX_N --> GTH_OR_GTX_N
IF_TYPE --> DDR_OR_SDR_N
PARALLEL_WIDTH --> DATA_WIDTH
ADD_SUB --> ADD_OR_SUB_N
A_WIDTH --> A_DATA_WIDTH
CONST_VALUE --> B_DATA_VALUE
IO_BASEADDR --> BASE_ADDRESS
IO_WIDTH --> DATA_WIDTH
QUAD_DUAL_N --> QUAD_OR_DUAL_N
AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT
ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH
ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH
MODE_OF_ENABLE --> CONTROL_TYPE
CONTROL_TYPE --> LEVEL_OR_PULSE_N
IQSEL --> Q_OR_I_N
MMCM --> MMCM_OR_BUFR_N
2015-08-19 14:11:47 +03:00
Lars-Peter Clausen 6862655b0d Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Rejeesh Kutty 71b5004b25 projects- drp moved to up-clock domain 2015-06-01 14:57:59 -04:00
Rejeesh Kutty aced144916 itx045: updates 2015-05-01 16:18:23 -04:00
Rejeesh Kutty ff443655ca itx045: add ps7 settings 2015-05-01 16:17:59 -04:00
Lars-Peter Clausen f232a36141 common: Place HDMI interface registers into the IOB
The paths from the HDMI interface registers to the IO pads are
unconstrained. This means the P&R can in theory put the register anywhere
which could lead to stability issues on the interface, depending on what
else is in the fabric. To get predictable delays for the register to IO pad
path place the register into the IOB section.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-23 14:33:47 +02:00
Lars-Peter Clausen 90e132d203 mitx045: Use interface connection for the I2S stream
Use a interface connection for the I2S stream instead of individually
connecting each of the signals. This make things a bit cleaner.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
Lars-Peter Clausen 1f2ecaf037 common: mitx045: Use interface connection for the HDMI DMA stream
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-08 13:29:25 +02:00
Adrian Costina bf1a50ef0c mitx: common, fixed number of gpios enabled 2015-03-31 16:16:40 +03:00
Istvan Csomortani 4f69ae19c5 adv7511_mitx045: Update latest frame work. 2015-03-30 17:54:37 +03:00
Istvan Csomortani c0f4d7e2b5 mitx045_common: Definition file patch
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.

NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
Istvan Csomortani e3378cd6cb mitx045_board_definition: revert old board definition file
Revert commit 4f6aa159b8. Those changes won't solve the issue.
mitx045.xml is the supported version under 2013.4
2014-11-18 10:05:55 +02:00
Istvan Csomortani 16cdae3001 mitx045_base: Delete unnecessary timing constraints. 2014-10-31 11:50:49 +02:00
Istvan Csomortani 67bec719f7 mitx045_base: Interrupt update 2014-10-31 11:45:33 +02:00
Lars-Peter Clausen 7d3be14ab5 common: Connect audio clkgen reset
While we are at it also hide the unused locked pin.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:44:46 +03:00
Lars-Peter Clausen fd89458708 common: Set cpu interconnect strategy to minimize area
There will rarely be concurrent access to the peripheral control bus
interconnect, so there is no need to optimize for performace. Setting the
interconnect strategy to minimize area can reduce the resource usage by
~90%.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:43:54 +03:00
Lars-Peter Clausen 43e9b0c7a6 common: Disable TTC0 MMIO routing for PS7
We do not use the ttc0 to MMIO routing, but it is enabled by default, so
explicitly disable it.
2014-10-10 16:19:51 +03:00
Istvan Csomortani 4f6aa159b8 mitx045: Base design now support 2014.2 2014-10-09 15:11:28 +03:00
Lars-Peter Clausen 41cc92ef49 Remove BASEADDR/HIGHADDR parameters
This is unused and unneeded. The AXI interconnect will make sure that a
peripheral only gets requests that are meant for it, there is no need to
check the address in the peripheral itself.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-11 12:26:37 +02:00
Lars-Peter Clausen 50faf0c53a Remove executable flags from non-exectuable files 2014-09-09 15:05:06 +02:00
Adrian Costina 2837d788a6 mitx045: Added I2S core to the base design 2014-06-06 17:53:47 +03:00
Adrian Costina 45325b7c0d mitx045: minor changes in common and ADV7511 projects 2014-06-03 19:24:12 +03:00
Adrian Costina c52327d0c6 common,adv7511: Added mitx045 platform. 2014-06-02 11:08:03 +03:00