Commit Graph

46 Commits (43f460e7444a676dff7fa1d43473c775f4d3496f)

Author SHA1 Message Date
Istvan Csomortani 5a257ce3c5 fmcomms5: Delete unused GPIO lines from system top
In the system top of the FMCOMMS5 projects, there are several GPIO lines, which
can not find in the constraint file, respectively gpio_open_15_15,
gpio_open_44_44 and gpio_45_45.

These are floating GPIO pins, as their names suggest. Delete all these wires and
update IOBUF instances.
2018-05-30 09:55:04 +03:00
Lars-Peter Clausen 377247a434 Regenerate project Makefiles using the new shared Makefile includes
This reduces the amount of boilerplate code that is present in these
Makefiles by a lot.

It also makes it possible to update the Makefile rules in future without
having to re-generate all the Makefiles.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-04-11 15:09:54 +03:00
Istvan Csomortani 425e803364 license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
Adrian Costina 98b58562d6 system_top: Non functional changes in system_tops to reduce warnings
Loop back the unused GPIO pins, and add all the SPI interface to system
wrapper instance.

The following system_top modules were changed:
  - ad738x_fmc
  - ad7616_sdz
  - ad77681evb
  - ad77681evb
  - ad7768evb
  - ad9739a_fmc
  - ad9434
  - adrv9739
  - fmcadc5
  - ad6676evb
  - ad9265
  - ad5766
  - fmcomms5
  - m2k
2018-04-11 15:09:54 +03:00
Istvan Csomortani a740b6012f Make: Use $(MAKE) for recursive make commands
This commit should resolve the issue #64.

Recursive make commands should always use the variable MAKE, not the explicit
command name ‘make’.
2018-03-07 07:40:19 +00:00
Lars-Peter Clausen 271731ebc8 fmcomms5: Remove wires that are redeclarations of ports
Fixes the following warnings:
	[Synth 8-2611] redeclaration of ansi port txnrx_0 is not allowed
	[Synth 8-2611] redeclaration of ansi port enable_0 is not allowed
	[Synth 8-2611] redeclaration of ansi port enable_1 is not allowed
	[Synth 8-2611] redeclaration of ansi port txnrx_1 is not allowed

This is a leftover of commit 1c23cf4621 ("all: Update verilog files to
verilog-2001").

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-02-16 13:32:26 +01:00
Adrian Costina b7ca17f02b scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
Istvan Csomortani 84b2ad51e2 license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
Istvan Csomortani 85ebd3ca01 license: Update license terms in hdl source files
Fix a few gramatical error, fix the path of the top level license
files.
2017-05-29 09:55:41 +03:00
Istvan Csomortani 9055774795 all: Update license for all hdl source files
All the hdl (verilog and vhdl) source files were updated. If a file did not
have any license, it was added into it. Files, which were generated by
a tool (like Matlab) or were took over from other source (like opencores.org),
were unchanged.

New license looks as follows:

Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.

Each core or library found in this collection may have its own licensing terms.
The user should keep this in in mind while exploring these cores.

Redistribution and use in source and binary forms,
with or without modification of this file, are permitted under the terms of either
 (at the option of the user):

  1. The GNU General Public License version 2 as published by the
     Free Software Foundation, which can be found in the top level directory, or at:
https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html

OR

  2.  An ADI specific BSD license as noted in the top level directory, or on-line at:
https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
2017-05-17 11:52:08 +03:00
Istvan Csomortani c9eaa43b1e fmcomms5: Update UP instantiations 2017-04-21 15:10:44 +03:00
Istvan Csomortani 1c23cf4621 all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00
Rejeesh Kutty 8063ba2b66 make updates 2017-03-20 16:05:18 -04:00
Rejeesh Kutty 9b6dd27c23 ad9361- delay initialization 2017-03-15 12:06:59 -04:00
Rejeesh Kutty dac75f79ab fmcomms5/usrpe31x- add iodelay report 2017-03-10 13:38:27 -05:00
Adrian Costina d2e7b6b635 fmcomms5: Added FIFOs for DAC and ADC paths so that they work at l_clk/2 or l_clk/4 2017-01-13 14:18:59 +02:00
AndreiGrozav 3bc9df4c51 fmcomms5: Fixed the wornings created by TDD missing connections to axi_ad9361 core 2016-12-07 21:43:19 +02:00
Istvan Csomortani 0cd608a7e2 lib_refactoring: Update Make files 2016-08-08 16:38:38 +03:00
Istvan Csomortani df36902713 lib_refactoring: Fix path of the IO macros 2016-08-08 15:07:19 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty e42b4ea378 hdlmake- updates 2016-08-04 13:28:25 -04:00
Istvan Csomortani 7ca8e10004 make: Update Make files 2016-08-01 14:24:48 +03:00
Rejeesh Kutty 3006c5a223 make updates 2016-04-11 16:14:59 -04:00
Adrian Costina 159f6c1216 Makefiles: Updated Makefiles
- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
Adrian Costina 9d2b8809df Makefiles: Updated Makefiles 2015-10-23 10:44:27 +03:00
Adrian Costina 7853843036 fmcomms5: Update ZC706 project 2015-09-25 17:32:29 +03:00
Adrian Costina a7da779b94 Makefile: Updated Makefiles 2015-07-16 18:19:42 +03:00
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Lars-Peter Clausen 6b9906b22b Refresh Makefiles
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Adrian Costina ebbc0c6ed5 fmcomms5: zc706, removed debug related ila, as the pins were removed from the AD9361 IP 2015-05-21 14:19:22 +03:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Adrian Costina 949abcdc8f Makefile: Updated makefiles so that the project recipe does not depend on lib 2015-05-06 14:58:29 +03:00
Adrian Costina dc2b37bd0c Makefile: Added top level Makefile. Modified behavior of clean and clean-all
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.

The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina 780455d68c Makefile: Updated makefiles. Added makefiles for altera 2015-04-09 17:57:06 +03:00
Rejeesh Kutty 5f8e9a74ea makefile: updated 2015-04-07 16:32:01 -04:00
Adrian Costina f79a152958 Makefiles: updated all makefiles adding clean functionality 2015-04-03 11:57:54 +03:00
Adrian Costina 51b5e4ddc5 fmcomms5: Moved the clock generation for dma transfer inside system_bd of the platform 2015-04-02 22:29:17 +03:00
Rejeesh Kutty 59698474af makefile: added 2015-04-01 16:29:49 -04:00
Adrian Costina fb3ee53790 fmcomm5: Updated ZC706 project 2015-03-31 17:43:30 +03:00
Adrian Costina 1828a94446 fmcomms5: Updated common and ZC706 project to the latest framework 2015-03-25 17:42:11 +02:00
Adrian Costina 0ade2a5f67 fmcomms5: Updated project to vivado 2014.2. Updated interrupt system. Fixed constraints 2014-11-07 13:45:15 +02:00
Adrian Costina e9f8c0fb5f fmcomms5: ZC706 modified constraints for linux build machines 2014-08-01 18:09:55 +03:00
Adrian Costina 7000897031 fmcomms2, fmcomms5: updated util_adc_pack and util_dac_unpack
The cores now support up to 8 channels, in 1, 2, 4, 8 channel active configuration
2014-07-24 19:57:22 +03:00
Adrian Costina a68f634de9 fmcomms5: Added resetb for the second AD9361 2014-07-24 17:31:30 +03:00
Rejeesh Kutty 7e6b4ea9d0 fmcomms5: ignore only common clock to external clocks 2014-05-19 20:38:41 -04:00
Rejeesh Kutty 9a36075324 moved fmcomms5 2014-05-19 13:49:49 -04:00