e22d5d5c18
daq2: Fix clock constraints for KC705 and VC707
2016-01-22 19:09:57 +02:00
59fbd99fdb
fmcjesdadc1: Added clock constraint for the ADC path
2016-01-22 15:46:20 +02:00
dca39c26f9
ad6676evb: Added clock constraint for the ADC path
2016-01-22 15:45:16 +02:00
9cd0378003
fmcadc2: Added clock constraint for the ADC path
2016-01-22 15:44:04 +02:00
aa77af6bdf
daq1_cpld: Add ISE project file
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This file, along with the project source files, is sufficient to open and implement in ISE Project Navigator.
2016-01-21 18:05:59 +02:00
4b962e8d72
spi_engine: The width of the counters depend on the current DATA_WIDTH
2016-01-20 15:44:06 +02:00
4cc69c0cac
axi_ad9684: Add Makefile
2016-01-19 18:32:11 +02:00
c865dbf353
axi_ad9680: Fix channel instantiation
2016-01-19 12:49:45 +02:00
df3eefdca1
axi_ad9434: Update constraint file
2016-01-19 12:43:05 +02:00
14f7027793
ad7616_sdz: Move the context switching to system_project.tcl
2016-01-19 11:34:28 +02:00
8c69c9d2ce
daq1_zc706 : Update the project
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+ Add AD9684 to the block design
+ Update the IO definitions
+ Update the CPLD design
+ Add 3wire SPI logic
2016-01-19 11:20:35 +02:00
d1e638349b
ad_serdes_clk : The reference clock selection line should by tied to 1
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Just the CLKIN1 is used in the MMCM.
2016-01-19 11:18:00 +02:00
c6cfd1a2b6
axi_ad9684: Initial check in
2016-01-19 11:13:45 +02:00
ab99c4456a
ad9434_fmc: Delete unnecessary set_property call
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HPx interface is activated by the ad_mem_hpx_interconnect process
2016-01-14 15:41:23 +02:00
c094ab8b52
cn0363: Add support for the MicroZed
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Add support for connecting the CN0363 to the MicroZed. This works in
combination with the MicroZed Arduino carrier board. The CN0363 needs to be
connected to the PLPMOD header.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
514eb68876
cn0363: Factor out common parts
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Factor out the common parts of the cn0363 design so we can use it to add
support for other carriers.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
d2b26720e6
common: microzed: Add clock, reset and interrupt support
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In order for the base project to be usable by other projects it needs to
create the clock, reset and interrupt signals that are expected to exist.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
51d20b1a61
adi_project.tcl: Add MicroZed support
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Handle the projects for the MicroZed and set up the FPGA part accordingly.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
426490c394
common: Rename uzed to microzed
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Everybody calls the MicroZed microzed in their projects. Don't deviate from
that to avoid potential confusion.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:18:57 +01:00
4f2b999999
axi_ad9680: Q_OR_I_N is not used in this channel
2016-01-13 16:26:22 +02:00
838b558176
axi_ad9434: Fix adc_status
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adc_status was not driven by anything. Should be driven by adc_status_m1.
2016-01-13 12:21:42 +02:00
2dcd9136aa
axi_ad6676: Delete confusing comment
2016-01-13 10:20:18 +02:00
c397787001
uzed: updates
2016-01-11 15:36:01 -05:00
a610ebb413
uzed: zed-copy
2016-01-11 13:53:22 -05:00
02cc926275
daq1: Add CPLD logic and IO constraints
2016-01-04 18:10:46 +02:00
7013b319b0
motcon2_fmc: Fixed reset connection for cpack cores
2015-12-22 12:03:34 +02:00
c29dd8fad5
axi_ad7616: Fix Makefile
2015-12-21 19:39:58 +02:00
0b55325db9
axi_ad7616: Fix IP packaging script
2015-12-21 19:39:14 +02:00
17e7d1b86f
ad7616: Add Makefiles
2015-12-21 17:09:42 +02:00
2bb19be3d3
pzsdr/ccfmc: sfp io control
2015-12-17 16:18:06 -05:00
f3fe16a102
pzsdr/ccfmc: camera/sfp pin changes
2015-12-17 16:17:24 -05:00
ea045a3f9a
fmcadc4: change qpll to receive
2015-12-17 12:34:47 -05:00
40ab2f5e6a
ccfmc: tdd/gpio bit moved to the top
2015-12-17 11:37:57 -05:00
34b832e22a
fmcomms6: Fixed reset connection for cpack core
2015-12-16 10:36:33 +02:00
35f6bd16e9
fmcomms5: Fixed reset connection for cpack core
2015-12-16 10:34:36 +02:00
83fd4a53a7
daq3/kcu105: updates
2015-12-14 09:29:48 -05:00
07316a905e
daq3/a10gx: sysref is lvds
2015-12-14 09:29:10 -05:00
ee4d5af12e
ad7616_sdz: Update the project
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+ Fix system_top.v
+ Finish up the common block design
+ Fix system_project.tcl
2015-12-14 16:02:38 +02:00
8ae9de8fba
axi_ad7616: Update core
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+ Both the data width and number of SDI lines are configurable
+ SER1W line is hardware configurable, it was removed from the IP
+ Add 'Hardware mode' support for the controller
2015-12-14 16:00:56 +02:00
4e57170384
spi_engine: Update SPI Engine frame work
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+ data width and number of SDI lines are configurable
+ axi_spi_engine module can have two different type of memory map interface (S_AXI or UP)
2015-12-14 15:57:54 +02:00
29a0f27cd1
ad_edge_detect: Add a flop to output, reset is active high
2015-12-14 15:40:29 +02:00
f4e3523390
ad7616_sdz: Update IO constraints
2015-12-14 15:34:56 +02:00
6a9d1c431a
daq3/a10gx: updated to a10gx/quartus
2015-12-11 12:49:25 -05:00
4c2d08a9be
ad9152: altera syntax error
2015-12-11 12:49:00 -05:00
da2e1bdc9a
daq2/a10gx: 32bits generic gpio
2015-12-11 11:50:26 -05:00
650d426301
a10gx/base: set gpio to 32
2015-12-11 10:14:37 -05:00
dc84a9ad82
daq3/a10gx: updates
2015-12-10 16:06:14 -05:00
f1b6577447
a10gx/base: separate gpio in/out
2015-12-10 16:04:54 -05:00
bc93910ee5
ad9152: qsys updates
2015-12-10 16:04:10 -05:00
ff1d98a0c7
ad9144: duplicate include
2015-12-10 16:02:35 -05:00
Istvan Csomortani
Adrian Costina
István Csomortáni
Lars-Peter Clausen
Rejeesh Kutty