Commit Graph

6 Commits (46d1ae58e96e196d999c2b5fbe89989482ed1b55)

Author SHA1 Message Date
Adrian Costina b7ca17f02b scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
Rejeesh Kutty 0b6fbf2208 daq2/vc707- 2016.2 updates 2016-08-17 10:34:06 -04:00
Istvan Csomortani df36902713 lib_refactoring: Fix path of the IO macros 2016-08-08 15:07:19 +03:00
Rejeesh Kutty 17918bf735 daq2/vc707: 2014.4 updates 2015-03-26 14:02:39 -04:00
Rejeesh Kutty e111e1336e conflicts- 2015-02-06 22:14:21 -05:00
Istvan Csomortani e1d8dd10a9 daq2: Initial check in of the VC707 based project
NOTE: Can not communicate with the clock chip, rx/tx PLL not locking.
2015-01-28 16:24:06 +02:00