79003c53db
ad_dds: Fix synthesis updates
...
- remove reset logic
- add wait for dac valid logic
- rewrite sine concatenation on wires for different path width to
suppress warnings
- use computed atan LUT tables
2018-07-18 18:19:30 +03:00
892febe68a
ad_dds_2: Remove unused disable logic feature
2018-07-18 18:19:30 +03:00
a7f5746afb
ad_dds: Add selectable phase width option.
2018-07-18 18:19:30 +03:00
7b553997ab
Add ad_dds.v
...
It will act as a wrapper for the previous dds modules(phase to angle conv.)
this module will furthermore contain the phase accumulator logic.
2018-07-18 18:19:30 +03:00
35e8454fe7
Rename ad_dds.v to ad_dds_2.v
2018-07-18 18:19:30 +03:00
AndreiGrozav