Lars-Peter Clausen
0e6cc95d0d
pzsdr1/pzsdr2: audio_clkgen: Disable clock source buffer insertion
...
Depending on the configuration of the clock source type of the input clock
the clocking wizard will instantiate all kinds of buffers on the input
clock signal.
For these particular projects there is no need to add any kind of buffer
since the source is already coming from a global clock buffer. So set the
configuration accordingly.
Avoids the following warning:
[Opt 31-32] Removing redundant IBUF since it is not being driven by a
top-level port. i_system_wrapper/system_i/sys_audio_clkgen/inst/clkin1_ibufg
Resolution: The tool has removed redundant IBUF. To resolve this
warning, check for redundant IBUF in the input design.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-21 13:22:33 +02:00
Lars-Peter Clausen
95a46bf1e1
pzsdr1/pzsdr2: audio_clkgen: Disable phase alignment
...
There is no need for the audio clock to be phase aligned to its source
clock. When phase alignment is disabled the MMCM uses an internal feedback
path without requiring external resources, so disable it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-21 13:22:33 +02:00
Lars-Peter Clausen
cfc51016ea
pzsdr1/pzsdr2: audio_clkgen: Infer input clock frequency
...
Instead of manually specifying the input clock frequency let the core infer
it automatically. This makes it more straight forward to change the clock
frequency.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-21 13:22:19 +02:00
Rejeesh Kutty
ddfbdfd2f7
pzsdr1/pzsdr2- ccbox added tws
2017-04-18 11:37:23 -04:00
Rejeesh Kutty
8063ba2b66
make updates
2017-03-20 16:05:18 -04:00
Rejeesh Kutty
9b6dd27c23
ad9361- delay initialization
2017-03-15 12:06:59 -04:00
Rejeesh Kutty
1b3f752c3d
pzsdr1/pzsdr2/pluto- add iodelay report
2017-03-10 12:55:22 -05:00
Rejeesh Kutty
c598e84258
remove processing order (no clock def dependency)
2017-02-22 16:02:08 -05:00
Adrian Costina
86c279c238
pzsdr1: ccbox, moved I2S core to DMA0 and DMA1 to fix critical warnings
2017-02-14 14:51:49 +02:00
Adrian Costina
6a9b7580de
pzsdr1: ccusb, renamed clk_out to clkout_in
2017-02-14 11:54:46 +02:00
Adrian Costina
acef0113d1
pzsdr1: ccusb, connect unused clock pins to GND
2017-02-14 11:50:37 +02:00
Adrian Costina
46883731eb
pzsdr1: Don't set a disabled parameter
2017-02-14 11:50:06 +02:00
Adrian Costina
ecd152c90d
pzsdr1: ccbrk_cmos, fix clkdiv parameters
2017-01-18 12:04:04 +02:00
Adrian Costina
165ba76d9d
pzsdr1: Added FIFOs for DAC and ADC paths so that they work at l_clk or l_clk/2
2017-01-18 12:01:24 +02:00
Istvan
06aab8ebbd
pzsdr1: Set the device core to 1R1T mode
2016-12-09 16:35:46 +02:00
Istvan
23c91ca48a
pzsdr1/lvds: The interface runs at max 122.88 MHz
2016-12-09 11:45:11 +02:00
Rejeesh Kutty
351811e13f
pzsdrx/ccbox- imu intr on gpio
2016-12-05 10:18:40 -05:00
Rejeesh Kutty
170c781d02
hdlmake.pl- updates
2016-12-01 13:52:11 -05:00
Adrian Costina
0faa1ebff2
pzsdr1: ccusb_lvds, add flag_a,flag_b signals
2016-11-30 17:38:04 +02:00
Adrian Costina
8c4279f618
pzsdr1: Added ccusb_lvds initial project
2016-11-22 16:58:34 +02:00
Rejeesh Kutty
b62f60b0da
pzsdr1/ccbox- updates
2016-11-17 16:14:28 -05:00
Rejeesh Kutty
935f8a5c7b
pzsdr1/ccbox- constraints
2016-11-17 16:13:53 -05:00
Rejeesh Kutty
4f65bcb3b2
pzsdr1/ccbrk_cmos- updates
2016-11-17 15:32:49 -05:00
Rejeesh Kutty
e85dd2740a
pzsdr1/ccbrk_lvds- updates
2016-11-17 15:32:25 -05:00
Rejeesh Kutty
a61da1d2ac
pzsdr1/common- updates
2016-11-17 15:31:25 -05:00
Rejeesh Kutty
aa02ca875f
pzsdr1- common files
2016-11-17 13:40:25 -05:00
Rejeesh Kutty
8c25402d53
pzsdr1- common files
2016-11-17 13:40:04 -05:00
Rejeesh Kutty
4dae754287
pzsdr1- added readme
2016-11-17 11:29:01 -05:00
Rejeesh Kutty
671a547c2b
hdlmake- updates
2016-11-01 12:41:25 -04:00
Adrian Costina
6607aa707d
pzsdr1: Renamed projects to have lvds/cmos sufix
2016-10-26 11:09:43 +03:00
Rejeesh Kutty
7db0c03a92
pzsdr1+ccbox -- updates
2016-10-19 10:32:28 -04:00
Rejeesh Kutty
918ce45e2a
pzsdr1/ccbox- updates
2016-10-17 16:29:57 -04:00
Rejeesh Kutty
cb97bc500a
hdlmake updates
2016-10-17 16:29:57 -04:00
Rejeesh Kutty
950acaed15
ccbox- copy
2016-10-17 16:29:57 -04:00
Rejeesh Kutty
2a7bc31c01
pzsdr1- disable gpreg constraints
2016-09-15 13:49:04 -04:00
Rejeesh Kutty
67d4e71ff0
pzsdr1- disable gpreg constraints
2016-09-15 12:41:40 -04:00
Istvan Csomortani
0cd608a7e2
lib_refactoring: Update Make files
2016-08-08 16:38:38 +03:00
Istvan Csomortani
df36902713
lib_refactoring: Fix path of the IO macros
2016-08-08 15:07:19 +03:00
Adrian Costina
d60bce654c
Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools
2016-08-05 15:16:04 +03:00
Rejeesh Kutty
e42b4ea378
hdlmake- updates
2016-08-04 13:28:25 -04:00
Istvan Csomortani
7ca8e10004
make: Update Make files
2016-08-01 14:24:48 +03:00
Rejeesh Kutty
a88ced8136
pzsdr1: lvds/cmos updates
2016-04-11 16:18:29 -04:00
Rejeesh Kutty
3006c5a223
make updates
2016-04-11 16:14:59 -04:00
Rejeesh Kutty
7e807d83b1
pzsdr1- cmos mode
2016-04-11 15:58:29 -04:00
Rejeesh Kutty
f7e490c2b3
hdlmake.pl updates
2016-02-26 13:46:11 -05:00
Rejeesh Kutty
bb62f6d225
pzsdr1- updates
2016-02-02 12:34:09 -05:00
Rejeesh Kutty
41b6ebeeaf
pzsdr1- updates
2016-02-02 12:33:55 -05:00
Rejeesh Kutty
bcac3eef4d
pzsdr1- initial commit
2016-01-25 16:07:33 -05:00