Commit Graph

4 Commits (4d676ca25a3e6cc4caf10db3e307488c346dc427)

Author SHA1 Message Date
Iulia Moldovan 1cac2d82e1 Add copyright and license to .xdc files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 11:03:02 +03:00
Istvan Csomortani ac2e5a9dac constraints: Update constraints
Xilinx recommends that all synchronizer flip-flops have
their ASYNC_REG property set to true in order to preserve the
synchronizer cells through any logic optimization during synthesis
and implementation.
2017-02-24 13:43:32 +02:00
Rejeesh Kutty 0def596b43 axi_xcvrlb- updates 2016-09-21 11:04:22 -04:00
Rejeesh Kutty d497a7b0ae axi_xcvrlb- constraints 2016-09-21 11:04:22 -04:00