0360e8587e
Connect JESD204 interrupts
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Connect the ADI JESD204 link layer peripheral interrupt signals in all
projects.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-07-05 14:37:50 +02:00
a7e72245ff
adrv9371: Convert to ADI JESD204 core
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Convert the ADRV9371 project to the ADI JESD204 link layer cores. The
change is very straight forward, but a matching change on the software side
is required.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
bc9483c5a2
Ip automatic version: Update ad*/common/ad*_bd.tcl
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ad6676evb/common/ad6676evb_bd.tcl
ad7616_sdz/common/ad7616_bd.tcl
ad7768evb/common/ad7768evb_bd.tcl
ad9265_fmc/common/ad9265_bd.tcl
ad9434_fmc/common/ad9434_bd.tcl
ad9467_fmc/common/ad9467_bd.tcl
ad9739a_fmc/common/ad9739a_fmc_bd.tcl
adrv9371x/common/adrv9371x_bd.tcl
adv7511/common/adv7511_bd.tcl
fmcadc4/common/fmcadc4_bd.tcl
2017-04-10 18:52:37 +03:00
d08d1d5a1b
adrv9371x ,daq3, fmcomms7, fmcomms11: add dac_fifo missing reset connection
2017-03-10 14:20:42 +02:00
6b1a8852a9
dacfifo- bypass port name change
2017-02-27 16:06:39 -05:00
0059c907ea
adrv9371: Drive the TX DMA interface with sys_dma_clk
2017-02-24 15:50:12 +02:00
62792ddaed
adrv9371x: Change the axi_adxcvr cores addresses
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Because the S_AXI interface of the axi_adxcvr core was infered
using the process adi_ip_properties, the interface address range
has changed from 4k to 64k. As a result, all the addresses of
the axi_adxcvr cores were changed and realigned.
2017-01-19 15:23:03 +02:00
e5d3bae54d
projects/ad6676-adrv9371: xcvr updates
2016-11-23 11:06:22 -05:00
801f980aeb
adrv9371: Fix parameter name
2016-10-21 12:50:20 +03:00
4950c6c773
adrv9371x - xcvr updates
2016-09-29 11:50:58 -04:00
270f8a6bbe
adrv9371x: Updated project common
2016-08-22 16:58:21 +03:00
2e80dec513
adrv9371x/zc706: Update project with the new axi_dacfifo
2016-06-22 12:33:47 +03:00
32d46389f2
adrv9371x: Move GTs AXI interface to HP3
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If the VDMA and the GTs AXI are connected to the same HP port, the
HDMI won't work on full resolution (1080p). Care should be taken, this can
affect the receive and observation paths (both are connected to HP2).
2016-05-27 14:13:55 +03:00
b452a8e2d4
adrv9371x: Connect bypass and data underflow
2016-05-27 14:13:55 +03:00
3859cba186
adrv9371x/zc706: Add PL_DDR FIFO to the design
2016-05-27 14:13:55 +03:00
f92e8509bb
adrv9371x- added
2016-05-20 11:46:25 -04:00
Lars-Peter Clausen
AndreiGrozav
Rejeesh Kutty
Istvan Csomortani
Adrian Costina