Commit Graph

7 Commits (5174bc1f6758c938487d4c76736543ca53bfbd15)

Author SHA1 Message Date
Istvan Csomortani 1c23cf4621 all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00
Istvan Csomortani 427cc84bb2 axi_ad7616: Rename the physical interface signals to rx_*
No functional modification.
2016-07-01 14:45:23 +03:00
Istvan Csomortani 6de356e8fc ad7616_sdz: Fix the data width at i_iobuf_adc_cntrl 2016-04-25 10:55:37 +03:00
Istvan Csomortani 7ce3f6e274 ad7616_sdz: Fix system top for parallel interface mode. 2016-03-24 13:49:30 +02:00
Istvan Csomortani a1c2c61884 ad7616_sdz: Update the IOBUF instance names 2016-03-24 11:46:33 +02:00
Istvan Csomortani a74e2061e9 ad7616_sdz: BUSY is input for the FPGA 2016-02-03 14:12:00 +02:00
Istvan Csomortani 118577f64f ad7616_sdz: Add support for parallel interface 2016-01-28 12:38:22 +02:00