Commit Graph

10 Commits (51b5e4ddc51257f8cffbe4f05b481d316eea8a0f)

Author SHA1 Message Date
Rejeesh Kutty 861341df2d makefile: added 2015-04-01 16:28:44 -04:00
Istvan Csomortani 7d1c715f09 adv7511_vc707: Fix system top. 2015-03-31 11:00:48 +03:00
Istvan Csomortani 166c78060c adv7511_vc707: Fix system top. 2015-03-29 16:17:08 +03:00
Istvan Csomortani f1e542abe3 adv7511_vc707: Constraint file added. 2015-03-26 13:03:51 +02:00
Istvan Csomortani d1e4727066 adv7511_vc707: Update project to the new framework. 2015-03-26 12:20:30 +02:00
Adrian Costina ce92d49565 adv7511: Updated VC707 project to include linear flash 2014-11-12 11:46:01 +02:00
Istvan Csomortani 0246a40e28 adv7511_vc707: Interrupt update 2014-11-03 13:02:05 +02:00
Istvan Csomortani 4f15f5c34c adv7511: Update interrupts.
The ad_interrupts.v was used to concatenate the interrupts.
2014-10-27 19:48:05 +02:00
Istvan Csomortani aa7b0bb4dd VC707 basesys: General fixes, actual status: working
- Add an auxiliary cpu interconnect
	- Add an auxiliary interrupt concatenation module
	- Add new MIG file, current frequency of the DDR interface is 100
	  Mhz
	- Memory interconnect optimisation strategy is 'Maximize
	  Performance'
2014-03-24 13:07:48 +02:00
Istvan Csomortani 75963ab376 Initial check in of VC707 base project
- All source files for the VC707 base project
	- Update the common base system to the new naming convention
2014-03-10 17:26:17 +02:00