Adrian Costina
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8ebc8fe4e2
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updated makefiles
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2016-12-09 23:06:41 +02:00 |
Istvan Csomortani
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7876c8ffa4
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axi_ad9684: Add loaden and phase ports for altera support
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2016-12-06 15:24:20 +02:00 |
|
Istvan Csomortani
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a7d3df8757
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axi_ad9684: Update hw tcl script for altera
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2016-12-06 15:24:20 +02:00 |
|
Istvan Csomortani
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de0c487195
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axi_ad9684: Add Altera support for the core
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2016-10-24 11:43:22 +03:00 |
AndreiGrozav
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91995c082d
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axi_ad9684: Fixed up_drp_*data width
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2016-10-12 13:20:26 +03:00 |
|
Istvan Csomortani
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df485d7878
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axi_ad9684: Fix the PN9 PRBS sequence monitor
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2016-09-28 10:47:16 +03:00 |
|
Istvan Csomortani
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ad16aec101
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axi_ad9684: Fix SERDES modules
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2016-09-26 11:14:35 +03:00 |
Rejeesh Kutty
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6837143110
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library/ adc parameter changes
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2016-09-23 13:44:47 -04:00 |
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Istvan Csomortani
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0cd608a7e2
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lib_refactoring: Update Make files
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2016-08-08 16:38:38 +03:00 |
|
Istvan Csomortani
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df36902713
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lib_refactoring: Fix path of the IO macros
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2016-08-08 15:07:19 +03:00 |
|
Adrian Costina
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d60bce654c
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Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools
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2016-08-05 15:16:04 +03:00 |
Shrutika Redkar
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6ebb32a194
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library axi-slave missing protection signal added
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2016-07-22 12:54:27 -04:00 |
|
Rejeesh Kutty
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c293c04634
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hdl make updates
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2016-06-01 13:53:09 -04:00 |
|
Rejeesh Kutty
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46eddd04be
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library: port updates on mmcm
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2016-03-22 12:50:59 -04:00 |
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Istvan Csomortani
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e1c5d6a8f7
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axi_ad9684: Fix constraint file
|
2016-02-12 14:38:59 +02:00 |
|
Istvan Csomortani
|
4cc69c0cac
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axi_ad9684: Add Makefile
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2016-01-19 18:32:11 +02:00 |
|
Istvan Csomortani
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c6cfd1a2b6
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axi_ad9684: Initial check in
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2016-01-19 11:13:45 +02:00 |