Commit Graph

10 Commits (57302820ed1490f3fc434dddcbb637cb3f4b382c)

Author SHA1 Message Date
Adrian Costina 1edec41cf8 daq1: Updated project with interrupts in IPI to work correctly in Linux 2015-03-17 17:41:51 +02:00
Istvan Csomortani 68ac015825 daq1_fmcl: Fix GT lane number definitions
Update which fix issues caused by GT lane number parameters change. (commit f8e7796592)
2014-11-24 18:23:33 +02:00
Istvan Csomortani 0ecfc14e95 daq1_fmc: Update interrupts. 2014-11-24 18:23:32 +02:00
Istvan Csomortani 9b104f1657 daq1_fmc: Get rid of the concat module inside the block design.
xl_concat just causing troubles, no need to use it, if not justified.
2014-11-24 18:23:30 +02:00
Istvan Csomortani 17675863e0 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
Rejeesh Kutty 577441bd0c daq1: clean up dma interfaces 2014-09-23 14:23:41 -04:00
Istvan Csomortani dd7bac41c1 daq1 : Update project to 2014.2
- Cores are upadted
  - Concat module does not swap output anymore
  - Clock signal name ps7_clk_* changed to clk_fpga_*
2014-09-22 17:33:50 +03:00
Istvan Csomortani 751bdd6cfc daq1: Update the constraint file
- tx_ref_clk and rx_sysref need to be differential
  - cosmetic changes
2014-09-19 18:22:57 +03:00
Istvan Csomortani a91f4bb6b9 daq1: General updates
- Add additional GT setups
- Use channel PLL instead of quad PLL
- Add additional ILA probes for debug
2014-09-13 00:23:11 +03:00
Istvan Csomortani ee752ec08a daq1: Initial commit 2014-09-01 18:34:31 +03:00