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4422 Commits (57a61f0635e8aa1fa0b0053d0ce492df7272dc4b)

Author SHA1 Message Date
Rejeesh Kutty f73819f4d4 zc706: pl ddr3 initial checkin 2014-05-13 16:19:53 -04:00
Rejeesh Kutty a007add714 iqcorrection: missing input signals fix 2014-05-09 11:17:50 -04:00
Rejeesh Kutty f3f8374c75 ad9671: 2lane version 2014-05-08 18:33:26 -04:00
Istvan Csomortani c5b3dd3643 vc707 base : tcl update 
- Added missing address space
    - Connect the sys_audio_clkgen/reset
 2014-05-08 12:30:25 +03:00
Rejeesh Kutty 3ac1da178e kcu105: sane except for ddr4/ethernet 2014-05-06 15:39:05 -04:00
Rejeesh Kutty 51c0ee1e20 ml605: tcl updates 2014-05-06 09:29:21 -04:00
Rejeesh Kutty e7cbaca216 ml605: initial checkin 2014-05-05 11:24:12 -04:00
Rejeesh Kutty 53af7f3c1f ml605: initial checkin 2014-05-05 11:20:26 -04:00
Rejeesh Kutty 1d50489870 ad9361: ml605 updates 2014-05-05 11:03:57 -04:00
Rejeesh Kutty 4d4f66fbdd a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
Rejeesh Kutty 5f2fb45b24 library: ported hdmi tx to altera 2014-05-02 12:07:47 -04:00
Rejeesh Kutty b55d0d7ad1 a5soc: constraints for false paths 2014-04-30 16:14:30 -04:00
Rejeesh Kutty a10043c4f4 kcu105: base complete with ethernet errors 2014-04-30 14:41:43 -04:00
Rejeesh Kutty 87d326a474 ignore cache 2014-04-30 14:41:41 -04:00
Rejeesh Kutty ef60cce15e kcu105: added 2014-04-30 14:41:40 -04:00
Rejeesh Kutty be69c0c330 kcu105: initial checkin 2014-04-30 14:41:39 -04:00
Rejeesh Kutty 9900a56fa5 kcu105: initial checkin 2014-04-30 14:41:37 -04:00
Rejeesh Kutty 0b1ce14842 a5soc: basic hardware build 2014-04-30 12:40:27 -04:00
Rejeesh Kutty 99d66e7580 a5soc: initial-copy version 2014-04-30 12:40:26 -04:00
Rejeesh Kutty 681e4239df ad9671/a5gt: subclass-0 version 2014-04-28 21:31:21 -04:00
Rejeesh Kutty 06873aeddb ad9671/a5gt: subclass-0 version 2014-04-28 21:31:20 -04:00
Rejeesh Kutty d66f256f1c 9671/a5gt: 9671-sc1 version 2014-04-28 21:31:19 -04:00
Rejeesh Kutty f55288ef5d ad9671: altera - base changes 2014-04-28 21:31:18 -04:00
Rejeesh Kutty 02e8b27626 initial checkin-9250 copy 2014-04-28 21:31:16 -04:00
Rejeesh Kutty 2e7bf190b5 initial checkin-9250 copy 2014-04-28 21:31:15 -04:00
Adrian Costina 01de117b5f motor_control: Changed controller to PID controller. Some estetic changes 2014-04-28 17:57:51 +03:00
Rejeesh Kutty fa998a406b dma: parameter fix 2014-04-24 15:50:16 -04:00
Rejeesh Kutty 314ec3d343 altera-9250/dma: make id width generic 2014-04-24 14:54:19 -04:00
Rejeesh Kutty dfc2bba335 ad9671: updates to allow default adc setup routines 2014-04-23 16:39:28 -04:00
Rejeesh Kutty a1bcf345c6 ad9671: fix spi connections 2014-04-21 13:46:44 -04:00
Adrian Costina 213e852e11 motor_control: Initial commit 2014-04-18 18:57:18 +03:00
Rejeesh Kutty 503096de18 gt: change userready on drp clock 2014-04-17 16:09:55 -04:00
Istvan Csomortani b185d46573 Add a link to EngineerZone 
Some users find these projects through github, and they do not know how/where to ask support.
 2014-04-15 10:25:18 +03:00
Adrian Costina ba44ee63be fmcomms1: modified the fmcomms1_bd.tcl to make it compatible with latest wfifo 2014-04-14 17:04:04 +03:00
Istvan Csomortani 179d6d601c adi_board.tcl : Use 'global' instead of '$::' 2014-04-14 11:45:35 +03:00
Rejeesh Kutty 38126c404c usdrx1: spi signal definitions 2014-04-11 14:28:23 -04:00
Rejeesh Kutty 06b28d2e24 ad9671: compile fixes 2014-04-11 14:28:22 -04:00
Rejeesh Kutty e92e6b2fd5 ad9671_fmc: changed for ad9671-fmc 2014-04-11 14:28:21 -04:00
Rejeesh Kutty 72e318a247 ad9671_fmc: initial checkin 2014-04-11 14:28:20 -04:00
ATofan 570ec26798 FMCOMMS2: Added sync option 2014-04-11 18:14:48 +03:00
ATofan 99ef34936f Merge branch 'master' of https://github.com/analogdevicesinc/hdl 2014-04-11 18:14:08 +03:00
U-ANALOG\ACostina c73390b6c9 axi_ad9361: Intermediary check in for altera porting 
This is work in progress. It will not work as it is
 2014-04-11 17:40:34 +03:00
Adrian Costina d0f04fd788 fmcomms1: Commit AC701 and VC707 projects 2014-04-11 17:35:25 +03:00
Istvan Csomortani c718169f27 adi_board.tcl : Fix the address assignment command 
A lot of cores have more than one address segments, therefor need
	to filter out the segment of the axi lite interface
 2014-04-11 16:14:56 +03:00
Istvan Csomortani cf5b9b51fd adi_board.tcl : Fix spi ports and hp clocks 2014-04-11 15:31:12 +03:00
Rejeesh Kutty af07f8874f wfifo/rfifo: asynchronous interface 2014-04-10 14:01:40 -04:00
Istvan Csomortani 37e2059fd0 adi_board.tcl : General update 
- Split the adi_dma_interconnect to two procedure:
	  adi_dma_interconnect and adi_hp_assign
	- Fix the adi_spi_core
	- Fix the adi_interconnect_lite
 2014-04-10 18:29:14 +03:00
Rejeesh Kutty 96541f0a7f usdrx1: zc706 updated for usdrx1 2014-04-10 11:05:13 -04:00
Rejeesh Kutty 6f36f74eea usdrx1: common board files 2014-04-10 11:05:11 -04:00
Rejeesh Kutty ac1c145a61 usdrx1: initial checkin 2014-04-10 11:05:10 -04:00