b5d3d0bd13
usb_fx3: Added axi_usb_fx3 core and DMA to the project
2015-10-27 09:41:18 +02:00
748a2bc87a
fmcadc4- add ila for zc706 only
2015-10-23 14:32:35 -04:00
b2d0f5c56e
fmcadc4- use the same source/name for clocks
2015-10-23 14:32:35 -04:00
9d2b8809df
Makefiles: Updated Makefiles
2015-10-23 10:44:27 +03:00
cb2bda48c0
fmcadc5- gt/ip updates
2015-10-19 09:31:32 -04:00
ed918ec119
imageon - keeping scripts happy
2015-10-16 15:04:02 -04:00
e14e9294c5
project-names -- variables causes scripts to fail- too much parsing
2015-10-16 14:13:56 -04:00
36dd6427fe
pzsdr: Add untracked Makefiles
2015-10-16 13:58:36 +03:00
bbdc693954
pzsdr/all: Update Makefile
2015-10-16 11:57:51 +03:00
08777ca566
fmcadc5- latest board changes
2015-10-15 10:46:07 -04:00
030485de28
fmcadc5- regulators need a switching ref clock?
2015-10-15 10:46:07 -04:00
f966f79e5f
fmcadc5- regulators need a switching ref clock?
2015-10-15 10:46:07 -04:00
199227b78c
fix fmcjesdadc1_bd ILA warning
2015-10-13 10:19:08 -04:00
21737ad7b8
fmcomms2/zc706pr: Update the fifo interface of the PR module
2015-10-13 11:37:44 +03:00
c9a5057b93
library/prcfg : Split data bus to channels
...
Because of the new pack/upack modules on the data path, it makes more sense to split the data interface of the PR modules into separate channels.
The top module will supports max 4 channels.
2015-10-13 11:36:45 +03:00
9bb70e2b69
motcon2_fmc: Updated ZED project
2015-10-09 15:33:31 +03:00
83fb5c742a
motcon2_fmc: Updated project to Vivado 2015.2.1
...
- added cpack cores
- removed controller DMA paths
2015-10-09 13:56:41 +03:00
88e8bef92f
usdrx1: Update ZC706 project
2015-10-09 13:33:45 +03:00
02c0a5f5df
usdrx1: Update project to Vivado 2015.2.1
2015-10-09 13:33:07 +03:00
c83239b014
fmcomms2/zc706pr: Update PR design
...
+ Add system_top.v to design
+ Add pr specific constraints
2015-10-09 13:23:42 +03:00
09be227db9
fmcomms2/zc706pr: Update PR design
...
+ Add system_top.v to design
+ Add pr specific constraints
2015-10-09 13:19:09 +03:00
e4517c0d6a
daq2/common: Connect reset to dac fifo
2015-10-08 16:51:08 +03:00
df88b33946
usb_fx3: Initial commit
...
Only the UART connections are available.
The FMC should not be populated at this time
2015-10-02 09:30:31 +03:00
b93af3c21e
daq3- bd updates
2015-09-30 10:11:49 -04:00
81a1c21553
util_pmod_adc: Reset line changed to active low reset.
2015-09-30 12:33:46 +03:00
5f12c8c7d4
cftl_cip/common: Fix parameter names for dmac
2015-09-30 12:32:48 +03:00
3dc881dbb3
pmods/xfest14: Delete directory
...
This project will not be supported from the next release
2015-09-30 12:25:31 +03:00
e6af671bea
cn0363/zed: Fix DMAC parameter names
2015-09-30 11:31:53 +03:00
4aa4ffc25f
imageon/common: Update cores to Vivado 2015.2
2015-09-29 18:51:46 +03:00
e60d2f86b3
imageon/common: Fix parameter name for spdif_rx
2015-09-29 18:50:41 +03:00
b4252a8512
imageon_loopback: Delete directory
...
This project will not be supported from the next releases.
2015-09-29 14:53:44 +03:00
9832cea071
ad9739a_fmc: Common, reduced DMA fifo size
2015-09-28 12:19:23 +03:00
5b48340b08
fmcomms6: Updated ZC706 project
2015-09-28 11:32:20 +03:00
3b3c645827
fmcomms6: Updated project to Vivado 2015.2.1. Added cpack
2015-09-28 11:31:08 +03:00
046c89dacd
fmcomms2/pr: Delete the fmcomms2_pr directory
...
The fmcomms2/pr project is moved to fmcomms2/zc706pr
2015-09-25 19:11:43 +03:00
f77f928444
fmcomms2/zed: Fix the system_top
...
Fix the enable/txnrx control line.
2015-09-25 19:11:41 +03:00
aeb1d7aa3e
fmcomms2/zed: Cosmetic changes
2015-09-25 19:11:39 +03:00
f8b3096bd0
fmcomms2/vc707: Fix the system_top
...
Fix the enable/txnrx control lines.
2015-09-25 19:11:37 +03:00
2c75cfd04e
fmcomms2/vc707: Cosmetic changes
2015-09-25 19:11:35 +03:00
ffa0bcd19f
fmcomms2/mitx045: Fix the system_top
...
Fix the enable/txnrx control lines.
2015-09-25 19:11:32 +03:00
28d20e84c5
fmcomms2/zc702: Fix the system_top
...
Fix the enable/txnrx control lines.
2015-09-25 19:11:30 +03:00
ea74413125
fmcomms2/kc705: Fix the system_top.
...
Fix the enable/txnrx control lines.
2015-09-25 19:11:28 +03:00
f80622b972
fmcomms2/ac701: Fix the system_top
...
Fix the enable/txnrx control line.
2015-09-25 19:11:26 +03:00
07e2d281c0
Make: Update Make files
2015-09-25 19:11:21 +03:00
1604e88242
fmcadc4: Update project to the new JESD interface framework
2015-09-25 19:11:19 +03:00
f4b432da08
fmcadc4: Update to 2015.2
2015-09-25 19:11:17 +03:00
4f99bdd93f
fmcadc5: Update project
...
+ Update the JESD IP core for Vivado 2015.2
+ Update the framework for JESD interface
2015-09-25 19:11:14 +03:00
f5b5bbfbca
fmcomms7: Update to the new JESD framework
...
Update project to the new framework for JESD interface and add a DAC FIFO to the transmit path.
2015-09-25 19:11:12 +03:00
fbd51c2734
fmcomms7: Update to 2015.2
...
Update IP core version of jesd204.
2015-09-25 19:11:10 +03:00
d198caa621
fmcomms2: Updated ZC702 design
2015-09-25 18:15:40 +03:00
4b115fbe69
ad9467_fmc: Delete ILA from the design
2015-09-25 17:41:46 +03:00
7853843036
fmcomms5: Update ZC706 project
2015-09-25 17:32:29 +03:00
108ffebae4
fmcomms5: Updated project to 2015.2.1
...
- added cpack / upack
2015-09-25 17:31:08 +03:00
848b51699c
fmcadc2: Updated VC707 project
2015-09-25 17:28:15 +03:00
e764f54426
fmcadc2: Updated ZC706 project
2015-09-25 17:26:54 +03:00
6fbd8dd9a5
fmcadc2: Update projecct to 2015.2.1
...
- updated to the new jesd framework
2015-09-25 17:25:32 +03:00
ab4b73fd32
ad6676evb: Updated VC707 project
2015-09-25 16:07:22 +03:00
33390c85f8
ad6676evb: Update ZC706 project
2015-09-25 14:46:02 +03:00
a49230ec07
ad6676evb: Updated project to 2015.2.1
...
- updated to the new jesd framework
- added cpack core
2015-09-25 14:44:46 +03:00
7f9c526683
fmcjesdadc1: VC707 update project
2015-09-24 19:50:14 +03:00
78fe05120b
fmcjesdadc1: Updated KC705 project
2015-09-24 19:14:48 +03:00
70c7c2aeb8
fmcjesdadc1: Updated ZC706 project
2015-09-24 19:14:05 +03:00
2ed161628d
fmcjesdadc1: Updated project to 2015.2.1
...
- updated to the new jesd framework
- added cpack core
2015-09-24 19:12:40 +03:00
58ab70bc0e
fmcomms1: Update AC701 project
...
Renamed mdio pin, as it's exported by the system wrapper
Renamed DMA parameter
2015-09-24 19:07:19 +03:00
f9801e8c85
pzsdr/cc*- rf card on fmc only
2015-09-23 09:16:41 -04:00
9832ea95a8
pzsdr/ccpci- initial version
2015-09-22 16:30:27 -04:00
14bccb6062
pzsdr/ccfmc- rf card/tdd only on fmc
2015-09-22 15:54:53 -04:00
fa5d879fdb
pzsdr/ccpci -- updates
2015-09-21 14:54:31 -04:00
fce96099ab
unused eth1 clocks
2015-09-21 14:54:31 -04:00
0702f2c231
ccpci- added
2015-09-21 09:31:18 -04:00
3a72d26f5b
pzsdr- pci carrier
2015-09-18 21:18:16 -04:00
9f8433159f
pzsdr- name changes
2015-09-18 16:24:27 -04:00
0d232a270a
pzsdr- breakout + fmc updates
2015-09-18 15:34:56 -04:00
3bd2bc4071
pzsdr- breakout + fmc updates
2015-09-18 15:34:36 -04:00
25f3f05c22
pzsdr- breakout + fmc updates
2015-09-18 15:33:50 -04:00
93b928033b
ccbrk- added
2015-09-18 13:24:26 -04:00
caec400378
pzsdr- make module default
2015-09-18 13:22:01 -04:00
236854c26f
pzsdr-cc-fmc updates
2015-09-18 12:46:42 -04:00
f970bf1786
pzsdr fmc carrier
2015-09-18 11:50:08 -04:00
b3a4f11e97
rfsom to pzsdr
2015-09-18 11:48:30 -04:00
0386bedff9
fmc carrier is -- ccfmc
2015-09-18 11:45:56 -04:00
92533bc24d
fmc carrier is -- ccfmc
2015-09-18 11:45:15 -04:00
48af5f29de
rfsom renamed to pzsdr
2015-09-18 11:19:50 -04:00
3ef94d559c
rfsom renamed to pzsdr
2015-09-18 11:18:59 -04:00
52d3f189a0
rfsom renamed to pzsdr
2015-09-18 11:18:01 -04:00
e2886eaa44
pzpcie- updates
2015-09-18 11:10:48 -04:00
379f788c8c
pzpcie- added
2015-09-18 11:10:48 -04:00
9e68357af5
usdrx1: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:19 +02:00
275830d2b1
motcon2_fmc: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:17 +02:00
8d179235f8
imageon: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:14 +02:00
9210e1d58a
fmcomms7: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:11 +02:00
39b032b868
fmcomms5: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:09 +02:00
cd8b467b1e
fmcomms2: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:07 +02:00
7e2255f4d9
fmcjesdadc1: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:05 +02:00
dd79dfdc12
fmcadc5: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:03 +02:00
7f5a22a75f
fmcadc4: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:28:01 +02:00
60490c4e2b
fmcadc2: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:27:59 +02:00
6c7316fbd0
daq3: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:27:56 +02:00
7184827d68
daq2: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:27:54 +02:00
f1fb599eb1
cn0363: Drop explicit axi_dmac clock synchronicity configuration
...
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:27:51 +02:00
Adrian Costina
Rejeesh Kutty
Istvan Csomortani
Nicholas Pillitteri
Lars-Peter Clausen