Rejeesh Kutty
|
fb5d36b250
|
pzsdr2- update ccfmc
|
2016-11-16 16:27:41 -05:00 |
Rejeesh Kutty
|
95c44b687e
|
pzsdr2- fmc/pci constraints
|
2016-11-16 16:27:41 -05:00 |
Rejeesh Kutty
|
11347c49be
|
fmcomms11- device set to -3
|
2016-11-16 13:43:07 -05:00 |
Rejeesh Kutty
|
b85a282748
|
fmcomms11- lane swap
|
2016-11-16 10:26:47 -05:00 |
István Csomortáni
|
bdd14c3874
|
README: Delete second rule under headers
By default there is a rule under each header, no need for another one.
|
2016-11-16 11:04:43 +02:00 |
István Csomortáni
|
81e47edcd5
|
README: Set links for documentation
|
2016-11-16 10:57:39 +02:00 |
rejeesh kutty
|
fabbe4981e
|
Update README.md
updated
|
2016-11-15 16:15:55 -05:00 |
Rejeesh Kutty
|
538a1c977f
|
pzsdr2: make files
|
2016-11-15 16:00:55 -05:00 |
rejeesh kutty
|
4905e80df8
|
Update README.md
updated
|
2016-11-15 14:16:46 -05:00 |
Rejeesh Kutty
|
db243df97e
|
pzsdr2- updates
|
2016-11-15 14:16:06 -05:00 |
AndreiGrozav
|
0897716167
|
fmcadc4: xcvr updates
|
2016-11-15 16:03:52 +02:00 |
AndreiGrozav
|
cac4057449
|
daq2/common: Altera updates
|
2016-11-15 16:03:52 +02:00 |
Rejeesh Kutty
|
cfd3ea61f1
|
pzsdr-to-pzsdr2
|
2016-11-14 14:12:22 -05:00 |
Rejeesh Kutty
|
f64b44c8ac
|
sdrstk2pluto- contents
|
2016-11-11 13:52:57 -05:00 |
Rejeesh Kutty
|
2ececad58c
|
sdrstk-2-pluto
|
2016-11-11 13:49:04 -05:00 |
Adrian Costina
|
c80033cb1b
|
util_fir_int: removed s_axis_data_tvalid and updated sdrstk
|
2016-11-11 17:52:19 +02:00 |
Rejeesh Kutty
|
e62fe0c086
|
fmcjesdadc1- a5gt/a5soc- sysclk is different
|
2016-11-11 10:34:18 -05:00 |
Istvan Csomortani
|
7008c641b5
|
axi_adrv9371/zc706: Constraints update
From source *jesd_rstgen* is a false path for TX and RX_OS too.
|
2016-11-11 10:35:09 +02:00 |
Rejeesh Kutty
|
85eac8c811
|
fmcjesdadc1/a5*- updates
|
2016-11-10 16:57:06 -05:00 |
Rejeesh Kutty
|
959055bd54
|
common/a5gt- updates
|
2016-11-10 16:56:35 -05:00 |
Rejeesh Kutty
|
7a2c713a4e
|
fmcjesdadc1/a5* - hdlmake.pl
|
2016-11-10 11:37:06 -05:00 |
Rejeesh Kutty
|
c6730ab2d7
|
fmcjesdadc1/a5gt- updates
|
2016-11-10 11:36:41 -05:00 |
Rejeesh Kutty
|
c207589f4b
|
fmcjesdadc1/a5gt - qsys2tcl flow
|
2016-11-10 11:32:29 -05:00 |
Rejeesh Kutty
|
8af0731bb0
|
a5gt- qsys2tcl flow
|
2016-11-10 11:30:18 -05:00 |
Adrian Costina
|
7a606cbae1
|
sdrstk: Maximum clock frequency is 61.44 in CMOS mode
|
2016-11-10 17:45:35 +02:00 |
Adrian Costina
|
d29ef14f36
|
sdrstk: Configured ad9361 in 1r1t mode
|
2016-11-10 17:06:42 +02:00 |
Istvan Csomortani
|
a54092c9bb
|
fmcjesdadc1: Update projects to xcvr framework
This commit contains modifications for Xilinx only
|
2016-11-10 10:59:52 +02:00 |
Istvan Csomortani
|
d6918de19e
|
ad6676: Update projects to xcvr frame work
|
2016-11-10 10:39:46 +02:00 |
Rejeesh Kutty
|
3cc416ca60
|
pzsdr1- fix typo on system_ps7
|
2016-11-09 12:04:30 -05:00 |
Istvan Csomortani
|
35c2dd5d6d
|
adrv9371x/zc706: Fix constraints
|
2016-11-09 16:34:08 +02:00 |
Rejeesh Kutty
|
0b58a2a1db
|
avl_adxcvr- sysclk frequency
|
2016-11-09 09:21:07 -05:00 |
Rejeesh Kutty
|
aef3e87d7e
|
fmcjesdadc1/a5soc -- xcvr frame work updates
|
2016-11-08 15:20:48 -05:00 |
Rejeesh Kutty
|
53c2f0642b
|
fmcjesdadc1/a5soc -- xcvr frame work updates
|
2016-11-08 15:20:33 -05:00 |
Rejeesh Kutty
|
f0af8216ce
|
common/a5soc- device can not run at 100M cpu clock
|
2016-11-08 15:19:23 -05:00 |
Rejeesh Kutty
|
d9cfccc05f
|
common/a5soc- gpio in/out separation
|
2016-11-08 15:19:02 -05:00 |
Rejeesh Kutty
|
acb9bf3902
|
hdlmake- a5soc/a5gt- updates
|
2016-11-04 15:02:57 -04:00 |
Rejeesh Kutty
|
6b492b79db
|
a10soc - remove default assignments
|
2016-11-04 15:01:19 -04:00 |
Rejeesh Kutty
|
8ea9beffaf
|
fmcjesdadc1- a5soc tcl updates
|
2016-11-04 15:01:19 -04:00 |
Rejeesh Kutty
|
4e99c3be9a
|
a5soc- tcl flow updates
|
2016-11-04 15:01:19 -04:00 |
Adrian Costina
|
ce3b6a2d3f
|
adrv9371x: Updated constraints for altera projects
|
2016-11-04 18:20:46 +02:00 |
Rejeesh Kutty
|
0dfbb0af11
|
arradio/c5soc- constraints changes- interface 1r1t
|
2016-11-03 11:25:52 -04:00 |
Rejeesh Kutty
|
128ca7719a
|
ccpci_lvds- rev.d. xcvr pin changes
|
2016-11-02 16:41:04 -04:00 |
Rejeesh Kutty
|
1cbea90bac
|
altera - a10gx bank swap
|
2016-11-01 12:41:25 -04:00 |
Rejeesh Kutty
|
1e0fed82f7
|
alt_serdes- a10 ddio fixes
|
2016-11-01 12:41:25 -04:00 |
Rejeesh Kutty
|
671a547c2b
|
hdlmake- updates
|
2016-11-01 12:41:25 -04:00 |
Adrian Costina
|
d010f3e687
|
sdrstk: Update Makefile to remove pack/cpack dependancy and add util_fir_dec/util_fir_int dependancy
|
2016-10-28 16:13:52 +03:00 |
Adrian Costina
|
ac8a6124af
|
sdrstk: Added interpolation and decimation filters. Removed cpack/upack
|
2016-10-27 19:33:28 +03:00 |
Rejeesh Kutty
|
50552ce7d6
|
adrv9371x- altera updates
|
2016-10-27 09:25:00 -04:00 |
Rejeesh Kutty
|
f752f0c9d7
|
a10soc- xcvr updates
|
2016-10-27 09:25:00 -04:00 |
Adrian Costina
|
d4c7b7ca57
|
ccusb_lvds: Fixed IIC constraints
|
2016-10-26 11:12:02 +03:00 |
Adrian Costina
|
6607aa707d
|
pzsdr1: Renamed projects to have lvds/cmos sufix
|
2016-10-26 11:09:43 +03:00 |
Adrian Costina
|
9ff92fdf5b
|
pzsdr: Renamed projects to have lvds/cmos sufix
|
2016-10-26 11:07:29 +03:00 |
AndreiGrozav
|
b8363d778d
|
arradio: Makefile update
|
2016-10-25 20:36:56 +03:00 |
Adrian Costina
|
138eeebc9b
|
ccusb_lvds: Initial commit
|
2016-10-25 16:32:44 +03:00 |
Rejeesh Kutty
|
5731ba3300
|
fmcomms11- xcvr updates
|
2016-10-24 09:51:40 -04:00 |
Istvan Csomortani
|
7e57a89ce5
|
daq1: Add support for A10GX
|
2016-10-24 11:43:33 +03:00 |
Rejeesh Kutty
|
c9ac870086
|
usrpe31x- updates
|
2016-10-21 13:59:43 -04:00 |
Rejeesh Kutty
|
7b958fed87
|
hdlmake- updates
|
2016-10-21 13:59:43 -04:00 |
Rejeesh Kutty
|
48e90f0e9b
|
usrpe31x- added
|
2016-10-21 13:59:43 -04:00 |
Istvan Csomortani
|
801f980aeb
|
adrv9371: Fix parameter name
|
2016-10-21 12:50:20 +03:00 |
Istvan Csomortani
|
3abd87631a
|
fmcomms11: Fix parameter name
|
2016-10-21 12:49:48 +03:00 |
Rejeesh Kutty
|
7db0c03a92
|
pzsdr1+ccbox -- updates
|
2016-10-19 10:32:28 -04:00 |
Adrian Costina
|
c1b7c5e77a
|
usb_fx3: Added FIFO on the FX3 to Zynq path, between FX3 core and DMA core
|
2016-10-19 09:30:51 +03:00 |
AndreiGrozav
|
17cfdd6be9
|
fmcomms2/a10gx: Update Makefile and qsys script
|
2016-10-18 12:42:14 +03:00 |
Rejeesh Kutty
|
918ce45e2a
|
pzsdr1/ccbox- updates
|
2016-10-17 16:29:57 -04:00 |
Rejeesh Kutty
|
cb97bc500a
|
hdlmake updates
|
2016-10-17 16:29:57 -04:00 |
Rejeesh Kutty
|
950acaed15
|
ccbox- copy
|
2016-10-17 16:29:57 -04:00 |
Adrian Costina
|
7c541c704a
|
usdrx1: ZC706, Update project to the new GT framework
|
2016-10-14 18:08:08 +03:00 |
Adrian Costina
|
1d1fe26624
|
fmcomms7: ZC706, Update project to new GT framework
|
2016-10-14 17:32:23 +03:00 |
Rejeesh Kutty
|
5bb77109ca
|
daq2/a10gx- make fix
|
2016-10-10 13:03:44 -04:00 |
Rejeesh Kutty
|
905e29eb01
|
hdlmake- altera
|
2016-10-10 12:55:55 -04:00 |
Rejeesh Kutty
|
e5cf417576
|
daq2/mb- xcvr procedures
|
2016-10-10 12:51:30 -04:00 |
Rejeesh Kutty
|
273073a584
|
daq2/kcu105- xcvr procedure
|
2016-10-10 11:12:47 -04:00 |
Adrian Costina
|
b3d3876dc5
|
imageon: ZC706, updated system_top to remove part of the Warnings.
- constraints fixed so Vivado doesn't issue a Warning
|
2016-10-10 17:33:42 +03:00 |
Adrian Costina
|
9efc45f0b6
|
imageon: Zed, updated system_top to remove part of the Warnings.
- spi csn signals should be tied to 1 if spi is not used
- constraints fixed so Vivado doesn't issue a Warning
|
2016-10-10 17:31:25 +03:00 |
Adrian Costina
|
8875c5bef3
|
fmcomms6: ZC706, updated system_top to remove part of the Warnings
|
2016-10-10 16:43:23 +03:00 |
Istvan Csomortani
|
fcd56a2f90
|
daq3/a10gx: Update project to the new GT framework
- Update common script
- Update system_top, some port names were changed
- Update constraint files
|
2016-10-10 16:22:08 +03:00 |
Adrian Costina
|
94f55f20e9
|
adv7511: KCU105, updated system_top to remove part of the Warnings
|
2016-10-10 16:12:17 +03:00 |
Adrian Costina
|
f464497062
|
cn0363: Microzed, updated system_top to remove part of the Warnings
|
2016-10-10 16:08:59 +03:00 |
Adrian Costina
|
2e605fc060
|
cn0363: Zed, update system_top to remove part of the Warnings
|
2016-10-10 15:56:46 +03:00 |
Adrian Costina
|
a12d34a98b
|
adv7511: Zed, updated system_top to remove part of the Warnings
|
2016-10-10 15:54:34 +03:00 |
Adrian Costina
|
c737afebf8
|
adv7511: KC705, updated system_top to remove part of the Warnings
|
2016-10-10 13:24:40 +03:00 |
Adrian Costina
|
74faac9210
|
ad9467_fmc: KC705, updated system_top to remove part of the Warnings
|
2016-10-10 13:19:55 +03:00 |
Rejeesh Kutty
|
ffaf78665f
|
daq2- xcvr procedures
|
2016-10-06 14:44:20 -04:00 |
Rejeesh Kutty
|
3b55822db3
|
daq2- xcvr connect
|
2016-10-06 14:09:27 -04:00 |
Rejeesh Kutty
|
721ee98a06
|
zcu102- misc fixes
|
2016-10-06 10:18:14 -04:00 |
Istvan Csomortani
|
8965bcffb7
|
make: Update make files for DAQ3
|
2016-10-06 10:27:00 +03:00 |
Istvan Csomortani
|
9ace02a227
|
daq3/a10gx: Update project to the new GT framework
|
2016-10-06 10:25:25 +03:00 |
Istvan Csomortani
|
58c4abd8af
|
daq3/kcu105: Update project to the new GT framework
|
2016-10-06 10:23:52 +03:00 |
Rejeesh Kutty
|
ca4dca87e2
|
daq2- updates
|
2016-10-05 14:02:59 -04:00 |
Rejeesh Kutty
|
baabe20766
|
common/zcu102- spi connections & clock
|
2016-10-05 14:01:59 -04:00 |
Istvan Csomortani
|
bab9b2df0b
|
daq3/zc706: Update project with the new transceiver modules
|
2016-10-05 17:41:25 +03:00 |
Adrian Costina
|
c196b5bf68
|
ad6676evb: VC707, fixed system top gpio_bd datawidth
|
2016-10-05 15:50:43 +03:00 |
Rejeesh Kutty
|
0208335ef3
|
hdlmake- updates
|
2016-09-30 13:20:22 -04:00 |
Rejeesh Kutty
|
27c9bdddb6
|
daq2/zcu102- 2016.2 updates
|
2016-09-30 11:55:10 -04:00 |
Rejeesh Kutty
|
8e1034946f
|
fmcomms2/zcu102- 2016.2 updates
|
2016-09-30 11:55:10 -04:00 |
Rejeesh Kutty
|
9afff7ae60
|
common/zcu102- 2016.2 updates
|
2016-09-30 11:55:10 -04:00 |
Rejeesh Kutty
|
33f9ed33c7
|
projects- ultrascale+
|
2016-09-30 11:55:10 -04:00 |
Rejeesh Kutty
|
0ded52d8f6
|
daq2/zcu102- kcu105 copy
|
2016-09-30 11:55:10 -04:00 |
Rejeesh Kutty
|
7290bcc81a
|
hdlmake- updates
|
2016-09-29 11:50:58 -04:00 |
Rejeesh Kutty
|
4950c6c773
|
adrv9371x - xcvr updates
|
2016-09-29 11:50:58 -04:00 |
Rejeesh Kutty
|
4a5b7fc723
|
scripts- reconnect added
|
2016-09-29 11:50:58 -04:00 |
Adrian Costina
|
e40311eee9
|
adrv9371x: A10soc, connected DMAs through 128 bit SDRAM0 port at 175MHz
|
2016-09-29 09:14:37 +01:00 |
Rejeesh Kutty
|
4239f64125
|
dacfifo- board pin warnings
|
2016-09-27 14:49:20 -04:00 |
Rejeesh Kutty
|
751a66eb72
|
plddr3/zc706- board pin warning
|
2016-09-26 15:20:37 -04:00 |
Rejeesh Kutty
|
79b9e21be8
|
board- xcvr procedure
|
2016-09-26 15:20:18 -04:00 |
Rejeesh Kutty
|
8314efd4e9
|
fmcomms11- xcvr updates
|
2016-09-26 15:19:29 -04:00 |
Rejeesh Kutty
|
7fd9280cbf
|
fmcomms11- xcvr updates
|
2016-09-26 15:19:05 -04:00 |
Adrian Costina
|
f5809b8817
|
adrv9371x: a10soc, added adcfifos; connected the new reset to all peripherals; used the new f2sdram1 port
|
2016-09-24 10:09:05 +03:00 |
Adrian Costina
|
2d307d5f58
|
a10soc: Added system reset bridge. Using F2SDRAM port used in the previous Qsys design
|
2016-09-24 10:06:35 +03:00 |
Rejeesh Kutty
|
df37a23a48
|
pzsdr/ccfmc- rgmii critical warnings fix
|
2016-09-22 11:38:43 -04:00 |
Rejeesh Kutty
|
dc6f7bbc4e
|
pzsdr/ccfmc - loopback updates
|
2016-09-22 11:18:13 -04:00 |
Rejeesh Kutty
|
0e2572bbd8
|
pzsdr- ccbrk_cmos- loopback changes
|
2016-09-21 13:16:04 -04:00 |
Rejeesh Kutty
|
14ad1ea741
|
pzsdr- swap clear-up
|
2016-09-21 13:15:40 -04:00 |
Rejeesh Kutty
|
21b5e9c634
|
hdlmake- updates
|
2016-09-21 11:56:03 -04:00 |
Adrian Costina
|
143423e3b9
|
adrv9371x: A10SOC, fix Makefile and system scripts to be compatible with altera
|
2016-09-21 18:13:02 +03:00 |
Adrian Costina
|
500d8bfb90
|
adrv9371x: A10GX, fix makefile and system_qsys.tcl script
|
2016-09-21 18:11:35 +03:00 |
Rejeesh Kutty
|
79f34c9de7
|
ccbrk- test updates
|
2016-09-21 11:04:22 -04:00 |
Rejeesh Kutty
|
a2e60cf693
|
ccbrk - test
|
2016-09-21 11:04:22 -04:00 |
Rejeesh Kutty
|
3ca9fe0919
|
sdrstk- remove critical warnings from ps7
|
2016-09-16 14:06:12 -04:00 |
Istvan Csomortani
|
f1e787f86b
|
fmcomms2: TDD control is enabled by default
|
2016-09-16 14:45:39 +03:00 |
Rejeesh Kutty
|
2a7bc31c01
|
pzsdr1- disable gpreg constraints
|
2016-09-15 13:49:04 -04:00 |
Rejeesh Kutty
|
67d4e71ff0
|
pzsdr1- disable gpreg constraints
|
2016-09-15 12:41:40 -04:00 |
Istvan Csomortani
|
16ee1336c3
|
Makefile: Update make files
|
2016-09-15 11:41:06 +03:00 |
Adrian Costina
|
631923e9f0
|
usb_fx3: Update to Vivado 2016.2
|
2016-09-14 15:41:27 +03:00 |
Istvan Csomortani
|
9118ca3986
|
version_upgrade: Update MOTCON2 to 2016.2
|
2016-09-14 10:58:06 +03:00 |
Rejeesh Kutty
|
cf9ac730a8
|
pzsdr1- new rev. board delays
|
2016-09-13 10:32:13 -04:00 |
Istvan Csomortani
|
9a2d2e8a02
|
version_upgrade: Update FMCADC4 to 2016.2
|
2016-09-13 15:04:11 +03:00 |
Rejeesh Kutty
|
236a938425
|
daq2/a10gx- qsys updates
|
2016-09-12 14:57:50 -04:00 |
Rejeesh Kutty
|
5df30ac6b0
|
daq2/a10gx- xcvr sharing
|
2016-09-12 14:57:50 -04:00 |
Adrian Costina
|
521c41ce32
|
adrv9371x: Updated a10soc project. Common design differentiates between nios and a10soc carrier
|
2016-09-08 11:44:45 +03:00 |
Adrian Costina
|
40c9fc92c1
|
a10soc: Switched to tcl flow
|
2016-09-08 11:31:06 +03:00 |
Adrian Costina
|
0d095f5da9
|
a10gx: Added system_type variable in common design
|
2016-09-08 11:29:14 +03:00 |
Istvan Csomortani
|
bae63ae5b1
|
version_upgrade: Update the DAQ3 project to 2016.2
|
2016-09-06 11:41:37 +03:00 |
Istvan Csomortani
|
b8c34791d5
|
version_upgrade: fmcjesdadc1 updated to 2016.2
Xilinx IP core JESD204 is updated to version 7.0
|
2016-09-06 11:41:37 +03:00 |
AndreiGrozav
|
b837883b98
|
pzsdr1/pzsdr1/pzsdr1_cmos_system_constr: Fixed voltage level selection
|
2016-09-01 17:16:59 +03:00 |
AndreiGrozav
|
93fa5aeec3
|
fmcadc2/vc707: Add adf4355 access, update design to Vivado 2016.2
|
2016-09-01 16:11:39 +03:00 |
Adrian Costina
|
dc21384002
|
pzsdr: Update ccpci base design
|
2016-09-01 09:06:30 +03:00 |
Rejeesh Kutty
|
2f9ac4a342
|
altera- qsys-script does not support most tcl commands
|
2016-08-30 11:50:36 -04:00 |
Rejeesh Kutty
|
917da79da1
|
altera- source defaults for qsys-script
|
2016-08-30 11:50:36 -04:00 |
Rejeesh Kutty
|
8192e755e1
|
altera- defaults
|
2016-08-30 11:50:36 -04:00 |
AndreiGrozav
|
1eccf5af07
|
fmcomms7: Update common design to Vivado 2016.2
|
2016-08-30 16:46:15 +03:00 |
AndreiGrozav
|
2015bcedaa
|
fmcadc2: Update common design to Vivado 2016.2
|
2016-08-30 16:42:58 +03:00 |
Adrian Costina
|
6f0d124861
|
fmcadc5: Update to Vivado 2016.2
|
2016-08-30 16:09:28 +03:00 |
Adrian Costina
|
4248b9373a
|
ad6676evb: Update to Vivado 2016.2
|
2016-08-30 16:08:07 +03:00 |
AndreiGrozav
|
a6e6b3f96e
|
version_upgrade: Update fmcomms1 common design to Vivado 2016.2
|
2016-08-29 15:59:15 +03:00 |
AndreiGrozav
|
2e59f377e1
|
version_upgrade: Update ac701, mitx045 and zed common design to Vivado 2016.2
|
2016-08-29 09:50:46 +03:00 |
Rejeesh Kutty
|
271029768c
|
pzsdr/cmos - swap==1
|
2016-08-26 10:31:00 -04:00 |
Adrian Costina
|
d18f6aa816
|
adrv9371x: A10GX, added adcfifo
- connected dac dma to 133 MHz clock
- set explicit clock rate to xcvr reference clock bridge
|
2016-08-26 14:46:48 +03:00 |
Istvan Csomortani
|
5cc2ab37a5
|
version_upgrade: Common ZC702 get an upgrade to 2016.2
Xilinx IP Clock Wizard updated to version 5.3
|
2016-08-26 10:20:04 +03:00 |