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5 Commits (6338dfd8b7939bd87e5115b0c186ddbbe51d54b8)

Author SHA1 Message Date
Istvan Csomortani 2e877389b2 ad9361_tdd: Some naming and hierarchical changes 2015-06-04 18:09:49 +03:00
Istvan Csomortani 3b1ea7e528 axi_ad9361/tdd: Cherry picked commit 598ece4 from hdl_2015_r1 branch 
598ece4c8d
 2015-06-04 18:09:47 +03:00
Istvan Csomortani a07d11c3e9 axi_ad9361_tdd: Define control bits for continuous receive/transmit 2015-05-14 17:21:32 +03:00
Istvan Csomortani 7c9bc40c75 axi_ad9361&TDD: Update TDD 
+ Delete unnecessary registers
+ Add the module ad_addsub.v to resolve additions and subtractions inside TDD control
+ Redefine the burst logic
+ Redesign the control signal generations
+ Note: This patch fix the TDD related timing violations
 2015-05-13 14:03:01 +03:00
Istvan Csomortani 2e7135c3c2 axi_ad9361_tdd: Initial commit. 
Add the TDD register map and TDD control module. Add TDD integration changes to axi_ad9361 IP core.
 2015-05-11 12:20:44 +03:00