Commit Graph

26 Commits (6517a94929fd7140ea01dcc1335170a484c0780b)

Author SHA1 Message Date
Istvan Csomortani 2912372d6e ad9625_fmc: Add support for AD-JESDCLOCK1-EBZ
Connect the SPARE_CLOCK_DUT pin to GPIO, this will be used to reset the AD9527.
The SPI interface for the clock chip is already integrated into the design.
2014-11-18 14:11:51 +02:00
Rejeesh Kutty 2eb80715e3 ad9625_fmc: dma fifo changes 2014-11-13 14:13:00 -05:00
Istvan Csomortani 897f5e219d ad9625_zc706: Update GT configuration 2014-11-11 19:25:30 +02:00
Istvan Csomortani a2a2552c60 ad9625_vc707: Update project to support linear flash interface 2014-11-06 15:01:58 +02:00
Istvan Csomortani d55ddc4da5 ad9625_vc707: Delete SEG_axi_bram_ctl_mem memory segment 2014-11-06 15:01:12 +02:00
Istvan Csomortani 0ffb1095d9 Revert "ad9625_vc707: Fix source file definition"
This reverts commit 6c80d88a0c.
2014-11-06 14:59:08 +02:00
Istvan Csomortani 6b7fccf56b ad9625_fmc: Preserve the IRQ layout 2014-11-06 12:20:26 +02:00
Istvan Csomortani 6c80d88a0c ad9625_vc707: Fix source file definition
The project using "p_sys_dmafifo" process, from sys_axi_dmafifo.tcl.
2014-11-04 15:21:25 +02:00
Rejeesh Kutty 8ed9d10502 ad9625_fmc: disable sync 2014-10-31 13:05:18 -04:00
Lars-Peter Clausen cc265b6b9c daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal
For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-29 18:15:54 +01:00
Rejeesh Kutty 2e01ad2eec ad9625_fmc/zc706: ps7 interrupt updates 2014-10-29 12:13:44 -04:00
Rejeesh Kutty 4788d09620 vc707: interrupt updates 2014-10-28 15:42:55 -04:00
Rejeesh Kutty c9691fac64 ad9625_fmc: merge zc706 and vc707 2014-10-28 10:12:19 -04:00
Rejeesh Kutty 627da6161b ad9625_fmc: remove dma clock for now - zynq/non-zynq merge 2014-10-28 10:12:18 -04:00
Istvan Csomortani 17675863e0 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
Rejeesh Kutty d4a21d9775 ad9625_fmc: constraints fix 2014-10-20 10:00:39 -04:00
Rejeesh Kutty 7f8270d74b ad9625_fmc: generic dma fifo for zynq and non-zynq boards 2014-10-17 14:38:16 -04:00
Rejeesh Kutty 0b30f98640 ad9625_fmc/zc706: remove top level constraints 2014-10-17 14:38:15 -04:00
Rejeesh Kutty c375b5b26e daq3: vivado build 2014-10-06 10:34:02 -04:00
Rejeesh Kutty f0927afd0b ad9625_fmc: add dma fifo for non-zynq 2014-10-01 14:51:14 -04:00
Michael Hennerich a3dbd5ac00 projects/common/vc707/vc707_system_bd: AD9625_FMC update to 2014.2
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-09-16 14:59:36 +02:00
Istvan Csomortani 4da8100fe5 ad9625_plddr: Delete trailing whitespaces. 2014-07-23 19:31:07 +03:00
Rejeesh Kutty b434fe6dd5 fmcomms5: register map changes 2014-07-08 16:57:43 -04:00
Rejeesh Kutty f2bf5ced04 ad9625: register map updates 2014-07-03 14:30:03 -04:00
Rejeesh Kutty e38813fa9f fifo- monitor status signals 2014-06-25 12:15:13 -04:00
Rejeesh Kutty 2d27f88588 ad9625_fmc, ad9625x2_fmc: initial checkin 2014-06-09 16:40:48 -04:00