7fba7cc6e5
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
af465cbc80
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
1220b53c8c
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
75c4228987
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
605d23d3a4
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
91765fdd82
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
7bf4141a3f
daq2+base: board tcl updates
2015-03-05 10:56:36 -05:00
bf1388b05e
kcu105: rev.d changes
2015-03-04 12:43:04 -05:00
4f918cdce9
2014.4.1 ultrascale updates
2015-02-26 16:10:57 -05:00
847c2e049a
kcu105: removed lutram constraints
2015-02-26 16:09:55 -05:00
1613f7fb41
cftl_cip: Add util_pmod_fmeter IP to library
...
Frequency meter IP for CN0332.
2015-02-23 17:20:12 +02:00
abde4048e0
fmcomms1: Add extra AXI slice on ADC DMA path
...
Add a extra AXI slice on the ADC DMA data path to the HP interconnect to
improve the timing.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-02-20 16:43:45 +01:00
b9d16a7eb1
scripts: renaming board parameters
2015-02-20 09:12:30 -05:00
288f5378ff
rfsom: schematic changes
2015-02-18 14:32:41 -05:00
93e2bcd911
rfsom: schematic changes
2015-02-18 14:32:30 -05:00
383cf3b3a3
rfsom: schematic changes
2015-02-18 14:32:20 -05:00
d2e9b1fe03
rfsom: schematic changes
2015-02-18 14:32:04 -05:00
3113abf038
cftl_cip: Add gpio counter for CN0332
...
Add a counter core to the design, to support the CN0332 pmod with a speed sensor.
Change a naming for the custom cores.
2015-02-18 18:24:46 +02:00
e111e1336e
conflicts-
2015-02-06 22:14:21 -05:00
2d607d765b
cftl_cip: Add a clock input to the device core, for the SPI clock.
...
This clock can be adjustable from the system_project.tcl
2015-02-04 14:55:17 +02:00
996e1b7970
rfsom: constraint updates
2015-02-03 14:20:34 -05:00
fd2ab02174
cftl_std: Added in the constraint file comments regarding supported CFTLs
2015-01-29 16:27:43 +02:00
d69d105b5d
vc707_common: Fix address mapping
...
The axi_ethernet/eth_buf/S_AXI_2TEMAC address space and axi_ethernet/eth_mac/s_axi/Reg address
segment does not exist in 2014.4.
2015-01-29 12:22:06 +02:00
e8ff30119d
vc707_xdc: Delete unnecessary clock definition
2015-01-29 11:39:10 +02:00
6c8ea24f20
common: Update VC707 base design to 2014.4
2015-01-28 16:24:52 +02:00
e1d8dd10a9
daq2: Initial check in of the VC707 based project
...
NOTE: Can not communicate with the clock chip, rx/tx PLL not locking.
2015-01-28 16:24:06 +02:00
659e0cca4e
cftl_cip: Initial check in.
...
Project cftl_cip supports the following Circuits from the Lab pmods:
+ EVAL-CN0350-PMDZ
+ EVAL-CN0335-PMDZ
+ EVAL-CN0336-PMDZ
+ EVAL-CN0337-PMDZ
Note: Additional testing needed!
2015-01-23 18:29:32 +02:00
463a3bbc88
cftl_std: Updated project. Switched to PS7 gpio. Renamed signals.
2015-01-23 14:11:33 +02:00
9672271155
fmcjestadc1: a5gt: Updated project to work with linux and fixed ethernet
...
- added phy reset mechanism for proper functioning of the ethernet
- not all DDR is accesible, as NIOS2 can't access it with MMU enabled
2015-01-23 13:30:56 +02:00
5a77ab0161
a5gt:common: Added phy reset signal from ethernet in pin assignments
2015-01-23 12:31:41 +02:00
050f17e034
a5gt3: common: corrected naming in pin assignments. added reset signal from FPGA2
2015-01-23 12:30:16 +02:00
72e89852b6
daq2/kc705: 2014.4 updates
2015-01-14 12:58:08 -05:00
024d9e7309
replace export hardware -- hwdef/sysdef
2015-01-13 13:40:21 -05:00
03988f1c9f
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:20 -05:00
b595cce697
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:18 -05:00
b0b4bfe531
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:17 -05:00
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
b9e2c5659f
fmcomms2: 2014.4
2015-01-09 14:12:54 -05:00
9e64df917c
daq2: 2014.4
2015-01-09 14:12:53 -05:00
65d9f08763
zc706: mig 2014.4
2015-01-09 14:12:52 -05:00
868df1aac8
zc706: mig 2014.4
2015-01-09 14:12:51 -05:00
0258afbadc
board: add ddr seg variable
2015-01-09 14:12:50 -05:00
22d881981e
cftl_std: Renamed cftl standard project
2015-01-09 19:44:13 +02:00
debbe31713
Merge remote-tracking branch 'origin/master' into dev
2015-01-09 11:12:56 -05:00
117686f352
ad9739a: updates for ad9739a
2015-01-09 10:54:50 -05:00
785d3a4ae3
ad9739a: updates for ad9739a
2015-01-09 10:54:40 -05:00
e8d0782a2e
ad9739a: updates for ad9739a
2015-01-09 10:54:22 -05:00
baea2090d6
ad9739a: updates for ad9739a
2015-01-09 10:54:12 -05:00
c9b6411e86
ad9739a: updates for ad9739a
2015-01-09 10:54:00 -05:00
51e6d0888a
cftl_xil_zed: Initial commit for common platform used with CFTL circuits
...
This common platform uses PS7 SPI and I2C to communicate with different chips.
On different connectors different pin configurations are supported:
- On connector JA, a spi interface and a 2 pin GPIO
- On connector JB, a I2C interface
- On connector JC, a spi interface with 2 chip selects
2015-01-09 17:47:29 +02:00
a9cc8f6c91
ad9739a_fmc: added
2015-01-08 10:35:59 -05:00
a170ebfb82
imageon: Initial commit
...
Initial commit of the IMAGEON project for ZC706. NOT tested.
2015-01-08 17:01:22 +02:00
f566268db5
zed_common: Updated common to 2014.4
2015-01-08 11:59:26 +02:00
f6df66ea06
motcon2_fmc: initial commit of the base design
...
Because vivado crashes when adding the speed detector, it's not part of this commit.
The controller is also not part of this commit
2015-01-08 11:57:22 +02:00
eb569b991d
dmafifo- remove util fifo setup
2015-01-06 16:23:14 -05:00
9e707d8a33
rfifo: wrapper updates
2015-01-06 16:17:33 -05:00
a944deebd5
wfifo: wrapper updates
2015-01-06 16:17:25 -05:00
d2baf17ff0
rfsom: updated to rfsom
2014-12-23 14:04:02 -05:00
3d1ba585ee
rfsom: updated to rfsom
2014-12-23 14:04:01 -05:00
19c2da836c
rfsom: updated to rfsom
2014-12-23 14:03:59 -05:00
61ba4f4357
rfsom: updated to rfsom
2014-12-23 14:03:58 -05:00
614dfcd93c
rfsom: updated to rfsom
2014-12-23 14:03:57 -05:00
4b571ded8f
fmcomms2/rfsom: initial commit
2014-12-23 14:03:56 -05:00
ee52602c89
rfsom: initial commit
2014-12-23 14:03:55 -05:00
8e41af7b92
fmcomms2: 2014.4 update
2014-12-23 14:03:54 -05:00
0de1a38245
zc706: 2014.4 update
2014-12-23 14:03:52 -05:00
43037a42eb
scripts: 2014.4 update
2014-12-23 14:03:51 -05:00
71baa129a7
VC707: Fixed linear flash timings
2014-12-19 15:45:14 +02:00
2ff72d60d1
fmcomms2: Updated VC707 project to fix ethernet problem
2014-12-19 15:45:05 +02:00
4a9c4cdf19
fmcadc2_zc706: Fix PLDDR fifo name
2014-12-19 13:01:33 +02:00
6230cb25b7
fmcomms7_zc706: Add constraint file for PLDDR
2014-12-19 13:01:27 +02:00
6e124c4c24
fmcomms7_zc706: Connect PLDDR rst to external push button
2014-12-19 13:01:21 +02:00
a0b83bac7f
fmcomms7_zc706: Delete trailing spaces from system top
2014-12-19 13:01:15 +02:00
362b0f5300
daq3_zc706: Add constraint file for PLDDR
2014-12-19 13:01:10 +02:00
d77e28e372
daq3_zc706: Connect PLDDR rst to external push button
2014-12-19 13:01:05 +02:00
d483801e2d
daq3_zc706: Delete trailing spaces from system_top
2014-12-19 13:00:59 +02:00
df205f5cea
fmcadc2_zc706: Connect PLDDR rst to external push button
2014-12-19 13:00:53 +02:00
8fc1f046a4
fmcadc4_zc706: Add constraint file for PLDDR
2014-12-19 13:00:48 +02:00
7ec1e282d9
daq2_zc706: Add constraint file for the PLDDR
2014-12-19 13:00:42 +02:00
a6cf615ee0
zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc
2014-12-19 13:00:35 +02:00
153a4cef18
daq2: missing sys_rst decl.
2014-12-19 13:00:21 +02:00
ad144ef06a
plddr3: sys-rst from board pushbutton
2014-12-19 13:00:07 +02:00
33a8c8a155
plddr3: sys-rst from board pushbutton
2014-12-19 13:00:01 +02:00
0cc29fe03b
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:54 +02:00
51bdcb1b12
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:48 +02:00
daba3fb72e
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:42 +02:00
758ac6bb8e
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:35 +02:00
1a9eb8196a
VC707: Fixed linear flash timings
2014-12-18 17:49:00 +02:00
23e2886b5d
fmcadc2_zc706: Fix PLDDR fifo name
2014-12-18 16:57:19 +02:00
b684c8bf33
fmcomms7_zc706: Add constraint file for PLDDR
2014-12-18 10:15:11 +02:00
ae09030044
fmcomms7_zc706: Connect PLDDR rst to external push button
2014-12-18 10:14:32 +02:00
0aa4661122
fmcomms7_zc706: Delete trailing spaces from system top
2014-12-18 10:13:16 +02:00
e81327b794
daq3_zc706: Add constraint file for PLDDR
2014-12-18 10:08:33 +02:00
8121d11993
daq3_zc706: Connect PLDDR rst to external push button
2014-12-18 10:07:52 +02:00
090aed508e
daq3_zc706: Delete trailing spaces from system_top
2014-12-18 10:06:29 +02:00
abdb59a28e
fmcadc2_zc706: Connect PLDDR rst to external push button
2014-12-18 10:04:01 +02:00
31a95042cf
fmcadc4_zc706: Add constraint file for PLDDR
2014-12-18 10:01:16 +02:00
39cc7b8b2e
daq2_zc706: Add constraint file for the PLDDR
2014-12-18 10:00:35 +02:00
59e610be09
zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc
2014-12-17 19:07:43 +02:00
656246f2ba
fmcomms2: Updated VC707 project to fix ethernet problem
2014-12-17 16:16:01 +02:00
Rejeesh Kutty
Istvan Csomortani
Lars-Peter Clausen
Adrian Costina