Commit Graph

1081 Commits (68cb6df3665cfcae483ee68014aff132d33095d6)

Author SHA1 Message Date
Lars-Peter Clausen 68cb6df366 imageon: Connect raw data to ILA
Connect the raw HDMI data as generated by the ADV7604 to the ILA. For
debugging it is quite useful to be able to compare the data before and
after conversion pipeline.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-01 18:43:51 +02:00
Lars-Peter Clausen c8a095f79c imageon: Increase ILA buffer size
2048 samples is not even enough for one 1080p line. Increase it to 4096.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-01 18:43:51 +02:00
Lars-Peter Clausen cb18b2c0fd imageon: Fix HDMI RX DMA data ILA probe width
The DMA data output of the HDMI RX core is 64-bit wide.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-01 18:43:51 +02:00
Lars-Peter Clausen c372064302 Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-01 18:43:51 +02:00
Istvan Csomortani 6b15704b70 fmcomms2_ALL: Preserve backward compatibility for ENABLE/TXNRX control
By default the ENABLE/TXNRX pins are controlled by GPIOs, if the TDD module is enabled, the TDD FSM will take over the control of these two pins.
2015-07-01 15:26:46 +03:00
Adrian Costina 499357a65a motcon2_fmc: Updated project to include XADC
- connected reset pin, as vivado reports the reset pin erroneously
- configured XADC in simultaneous sampling mode from XAUX0 and XAUX8
- connected XADC interrupt
- because in the project constraints some base pin constraints are overwritten, the project constraints are processed late
- GPI pins were assigned instead of the XADC GIO0 and GIO1, which were assigned to the XADC for external mux mode
- removed commented code
2015-06-29 16:56:25 +03:00
Istvan Csomortani f32039f154 imageon: Hdmi_iic_rstn is accessible through a GPIO.
Connect hdmi_iic_rstn to GPIO[33]
2015-06-29 10:49:59 +03:00
Adrian Costina fcc185d769 Makefile: Updated makefiles
- removed up_drp_control, up_delay_control dependencies where not needed
- added axi_jesd_gt core in the library makefile
- fixed timing tcl dependency for altera projects
2015-06-25 14:59:34 +03:00
Adrian Costina 9fa705c488 fmcadc2: Fixed zc706 spi connection 2015-06-19 13:13:02 +03:00
Adrian Costina 41799c55dc fmcjesdadc1: Fixed mdc_mdio connection for kc705 2015-06-18 11:04:29 +03:00
Adrian Costina 6de154d2c2 fmcomms1: Fixed mdc_mdio connection for kc705 2015-06-18 11:04:00 +03:00
Adrian Costina 988f4fac8f ad9467: Fixed mdc_mdio connection for kc705 2015-06-18 11:03:11 +03:00
Adrian Costina e6d9735e54 fmcomms1: Fixed zed top file, the DAC dma was not correctly connected 2015-06-17 14:43:34 +03:00
Adrian Costina a2f380ab64 fmcjesdadc1: Fixed vc707 ethernet connections 2015-06-16 15:31:17 +03:00
Adrian Costina 98ae6d567f adv7511: Fixed vc707 ethernet connections 2015-06-16 15:30:47 +03:00
Adrian Costina 3d86f140e5 usdrx1: Removed ILA as the ports from axi_jesd_gt were removed 2015-06-10 10:56:55 +03:00
Istvan Csomortani 1fcdeac054 fmcjesdadc1/common: The new GT module does not have integrated monitor/debug ports 2015-06-09 11:50:55 +03:00
Istvan Csomortani 2330d1e27d daq1/common: The new GT module does not have integrated monitor/debug ports 2015-06-09 11:50:27 +03:00
Istvan Csomortani 47469ad375 ad9434/ad9467 : Connect reset signal for AXI streaming interface of the device dma 2015-06-04 18:09:48 +03:00
Istvan Csomortani 3b1ea7e528 axi_ad9361/tdd: Cherry picked commit 598ece4 from hdl_2015_r1 branch
598ece4c8d
2015-06-04 18:09:47 +03:00
Rejeesh Kutty a8a71b4971 alt-tq: common file 2015-06-04 11:00:25 -04:00
Rejeesh Kutty f81d22a17a altera- common timing check 2015-06-04 10:56:32 -04:00
Rejeesh Kutty d111692608 daq2/a10gx- ddr-ref @133 2015-06-04 10:53:16 -04:00
Rejeesh Kutty 886c24f597 tq-alt: added 2015-06-04 10:53:14 -04:00
Lars-Peter Clausen 264dbfed35 common: rfsom: Add constraints for the eth1 rx clock
Add clock rate constraints for the eth1 rx clock, otherwise the tools
assume the RX paths are unconstrained and creates a bitstream which
violates hold times which causes bit errors on the RX path.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-03 17:21:43 +02:00
Rejeesh Kutty 71b5004b25 projects- drp moved to up-clock domain 2015-06-01 14:57:59 -04:00
Rejeesh Kutty f9ffaf457d projects/daq2- drp moved to up clock 2015-06-01 13:39:26 -04:00
Rejeesh Kutty 4a701d3895 a10gx- no-ddr 2015-06-01 11:00:02 -04:00
Rejeesh Kutty aa24c442f5 a10gx- no-ddr 2015-06-01 11:00:01 -04:00
Lars-Peter Clausen 5250635162 cn0363: Fix ad_iobuf signal names
The signal names for the ad_iobuf were recently changed, adjust the cn0363
project accordingly.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-27 13:25:19 +02:00
Lars-Peter Clausen 73d7bc111e cn0363: Add missing Makefiles
Those were accidentally overlooked during the initial commit of the project.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-26 18:44:24 +02:00
Adrian Costina 77eff35d67 motcon2_fmc: Fixed constraint for renamed port 2015-05-23 19:02:48 +03:00
Adrian Costina 29ca9e4b8c vc707: common, fixed address range for flash 2015-05-23 00:14:08 +03:00
Adrian Costina 8bd5fa5802 kc705: Common, fixed address range for the flash. Changed the start address so that it won't interfere with other cores 2015-05-23 00:10:06 +03:00
Istvan Csomortani f91fbf1bc1 ad9434_zc706: Fix SPI interface 2015-05-22 12:31:48 +03:00
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Rejeesh Kutty ad3198f623 a10gx: top level fixes 2015-05-21 14:06:15 -04:00
Lars-Peter Clausen c9832d2f84 Remove ad7175_zed project
This project has been superseded by the cn0363 project and can be removed.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 17:21:35 +02:00
Lars-Peter Clausen c53f8c15ee Add CN0363 project
Add support for the CN0363 (colorimeter) board connected to the ZED board.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 17:21:35 +02:00
Lars-Peter Clausen 6b9906b22b Refresh Makefiles
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Adrian Costina ebbc0c6ed5 fmcomms5: zc706, removed debug related ila, as the pins were removed from the AD9361 IP 2015-05-21 14:19:22 +03:00
Istvan Csomortani a047d3990a fmcadc2_vc707: Fix interrupts
+ Remove some trailing whitespaces
+ Fix interrupt connections
2015-05-21 11:03:16 +03:00
Rejeesh Kutty 19b094cab5 daq2/a10gx- added jesd align 2015-05-20 15:39:27 -04:00
Rejeesh Kutty f1c30ac225 daq2/a10gx- qsys updates 2015-05-20 14:24:49 -04:00
Rejeesh Kutty 4927ca85c2 projects- jesd-align port name change 2015-05-20 14:24:26 -04:00
Rejeesh Kutty 52b6077a46 a10gx- 15.0 updates 2015-05-19 15:12:23 -04:00
Rejeesh Kutty 0805da3b6b fmcomms2/rfsom- enable dac delay 2015-05-18 16:45:54 -04:00
Rejeesh Kutty 3e51d29f75 enable/txnrx- tdd changes 2015-05-18 14:28:20 -04:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Rejeesh Kutty 672a5a4dfa a10gx- updates 2015-05-14 14:35:43 -04:00