Commit Graph

9 Commits (6b15704b7008cef6316e4f2e18f6e0a91c8a221f)

Author SHA1 Message Date
Lars-Peter Clausen c9832d2f84 Remove ad7175_zed project
This project has been superseded by the cn0363 project and can be removed.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 17:21:35 +02:00
Adrian Costina 22d881981e cftl_std: Renamed cftl standard project 2015-01-09 19:44:13 +02:00
Adrian Costina 51e6d0888a cftl_xil_zed: Initial commit for common platform used with CFTL circuits
This common platform uses PS7 SPI and I2C to communicate with different chips.
On different connectors different pin configurations are supported:
- On connector JA, a spi interface and a 2 pin GPIO
- On connector JB, a I2C interface
- On connector JC, a spi interface with 2 chip selects
2015-01-09 17:47:29 +02:00
Istvan Csomortani 2bd154ad59 xfest14_zed: Update project to 2014.2 2014-11-25 12:53:42 +02:00
Lars-Peter Clausen 7ad9340992 pmod_ad7175: Connect gain control pin
Connect the gain control pin to GPIO32 of the ZYNQ.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-03 15:00:02 +01:00
acozma 36c7034bd6 ad7175: Fix dma issues 2014-10-28 16:00:06 +02:00
acozma 9e1d1c1b49 ad7175: Updated the AD7175 IP and project 2014-10-28 14:28:38 +02:00
acozma 24e11b30b9 ad7175_zed: added the ad7175 ZED project 2014-10-23 06:15:17 +03:00
Lars-Peter Clausen a54e4edb08 Add xfest14 PMODs project
This project has a SPI controller connected to each of the ZED boards PMOD
ports JA, JB, JC, JD pin 1-4. Pin 7-10 are connected to the PS7 general purpose
GPIOs, except for JC where it is connected to the PS7 UART controller.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-08-12 10:14:16 +02:00