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49 Commits (6d0a2bf64ce530b2c73a50b680ba68152dc8c8b0)

Author SHA1 Message Date
Rejeesh Kutty 0a8823361f fmcjesdadc1/a5gt: 14.1 updates 2015-04-03 14:54:57 -04:00
Rejeesh Kutty 3aac5f9494 fmcjesdadc1/a5gt: 14.1 updates 2015-04-03 14:54:55 -04:00
Adrian Costina 49b8d389f6 fmcjesdadc1: Kc705, fixed system top,SPI 2015-04-03 18:28:26 +03:00
Adrian Costina f79a152958 Makefiles: updated all makefiles adding clean functionality 2015-04-03 11:57:54 +03:00
Rejeesh Kutty 9e8cb22c96 makefile: added 2015-04-01 16:29:21 -04:00
Rejeesh Kutty 0a62cc9b8e makefile: added 2015-04-01 16:29:19 -04:00
Rejeesh Kutty 661cdc5752 makefile: added 2015-04-01 16:29:18 -04:00
Rejeesh Kutty 0275f5575b makefile: added 2015-04-01 16:29:17 -04:00
Rejeesh Kutty b7d72a5b2e makefile: added 2015-04-01 16:29:16 -04:00
Rejeesh Kutty 71adb70844 makefile: added 2015-04-01 16:29:14 -04:00
Adrian Costina 11379939d0 fmcjesdadc1: VC707, Updated project to the latest framework 2015-03-30 18:08:19 +03:00
Adrian Costina c7e4ba5083 fmcjesdadc1: Updated KC705 to the latest flow 2015-03-30 18:07:47 +03:00
Adrian Costina ccf0542218 fmcjesdadc1: Connected constant 0 to unconnected inputs 2015-03-26 12:08:14 +02:00
Adrian Costina d418c9f9b1 fmcjesdadc1: Updated project to new flow. Updated ZC706 design 2015-03-24 10:38:14 +02:00
Adrian Costina 9672271155 fmcjestadc1: a5gt: Updated project to work with linux and fixed ethernet 
- added phy reset mechanism for proper functioning of the ethernet
- not all DDR is accesible, as NIOS2 can't access it with MMU enabled
 2015-01-23 13:30:56 +02:00
Adrian Costina 47871287f3 kc705: Updated base project with linear flash. Updated all depending projects 2015-01-13 10:19:07 +02:00
Rejeesh Kutty ca36ef0e02 Merge remote-tracking branch 'origin/hdl_2014_r2' into dev 2014-12-11 11:26:30 -05:00
Adrian Costina 6ac774a9dd fmcjesdadc1: Update altera system_timing script 2014-12-10 17:53:29 +02:00
Michael Hennerich 138e789fb6 projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts 
sys_concat_intc: don't reset NUM_PORTS to 6

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
 2014-12-09 17:38:16 +01:00
Istvan Csomortani 915ee7a268 fmcjesdadc1_kc705: Connect the SPI interrupt to the controller 2014-12-09 11:54:16 +02:00
Istvan Csomortani 37c3af9929 fmcjesdadc1_kc705: Connect the SPI interrupt to the controller 2014-12-09 11:51:36 +02:00
Istvan Csomortani 84f8377beb fmcjedadc1_vc707: Add support for linear flash interface 2014-11-21 19:19:21 +02:00
Istvan Csomortani e8546b9c3b fmcjesdadc1: Update interrupts for KC705 and VC707 2014-11-21 19:18:30 +02:00
Istvan Csomortani b0f571ce0c fmcjesdadc1: Fix parameter lane number for GT core 2014-11-21 19:17:29 +02:00
Istvan Csomortani 57137df018 fmcjesdadc1_zc706: Interrupt update 2014-11-03 13:02:09 +02:00
Istvan Csomortani 17675863e0 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
Istvan Csomortani 02802644bf fmcjesdadc1: Fix a few warning and issue with ILA 
+ GPIO width is 15
+ Fix ILA core
 2014-10-15 15:37:05 +03:00
Istvan Csomortani 6f77af4aff fmcjesdadc1: Upgrade project to 2014.2 2014-10-09 18:55:27 +03:00
Lars-Peter Clausen 50faf0c53a Remove executable flags from non-exectuable files 2014-09-09 15:05:06 +02:00
Istvan Csomortani 9f3461b130 fmcjesdadc1: Added support for KC705 2014-09-02 18:02:25 +03:00
Istvan Csomortani 2ce7695bf7 fmcjesdadc1: Initial commit of VC707 version 2014-09-01 18:47:01 +03:00
Istvan Csomortani 9a80fec4e4 fmcjesdadc1: Delete trailing whitespaces 2014-09-01 18:45:20 +03:00
Rejeesh Kutty 5f21f54463 fmcjesdadc1: zc706 version 2014-08-25 14:28:57 -04:00
Rejeesh Kutty cb29b83b05 a5gt: updates to match a5gt 2014-08-25 10:46:59 -04:00
Rejeesh Kutty 76ffb939e5 zc706: ad9625 copy 2014-08-22 11:24:24 -04:00
Rejeesh Kutty 39bb7ca231 a5soc: fmcjesdadc1+hdmi version 2014-08-14 09:05:38 -04:00
Rejeesh Kutty 96969079ce a5soc: fixes for 14.0 and spi conflicts 2014-08-11 16:46:37 -04:00
Rejeesh Kutty 60dd14bcdb a5soc: removed jtag master control 2014-07-01 12:27:37 -04:00
Rejeesh Kutty 92e525d573 ad9250: register map updates 2014-06-25 15:24:48 -04:00
Rejeesh Kutty 4d4f66fbdd a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
Rejeesh Kutty b55d0d7ad1 a5soc: constraints for false paths 2014-04-30 16:14:30 -04:00
Rejeesh Kutty 0b1ce14842 a5soc: basic hardware build 2014-04-30 12:40:27 -04:00
Rejeesh Kutty 99d66e7580 a5soc: initial-copy version 2014-04-30 12:40:26 -04:00
Rejeesh Kutty 33979fc533 fixes to improve timing - fifo for clock domain transfers 2014-04-04 13:49:53 -04:00
Rejeesh Kutty 6a19b34a00 a5gt: added tightly coupled memory 2014-04-03 20:50:17 -04:00
Rejeesh Kutty 12e5cc91bd make signaltap/timing part of the flow 2014-04-03 20:50:15 -04:00
Rejeesh Kutty e85153b5dd altera hal version 2014-04-01 21:12:11 -04:00
Rejeesh Kutty 04df908fbf altera-fmcjesdadc1 initial checkin 2014-04-01 12:01:57 -04:00
Rejeesh Kutty 0d678b89ed altera a5gt fmcjesdadc1 setup 2014-04-01 11:46:37 -04:00