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33 Commits (6e9780343777e385a33b9e97bc35d56b8817ec31)

Author SHA1 Message Date
Sergiu Arpadi 6f2f2b8626 makefile: Regenerate make files 2021-01-20 01:02:56 +02:00
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a 
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
 2021-01-20 01:02:56 +02:00
Adrian Costina b080b52a14 daq3:zcu102: Connect overflow pins for the AD9680 TPL 2020-11-11 14:24:02 +02:00
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific 
Updated all system_project and Makefiles
 2020-11-02 16:13:35 +02:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Laszlo Nagy 88e80f604e daq3:zcu102: fix GPIO double drive 2019-11-26 14:41:19 +02:00
Istvan Csomortani aa5fdf903e Makefile: Update makefiles 2019-08-26 16:58:01 +03:00
Arpadi 0680e44330 system_id: deployed ip 2019-08-06 16:53:11 +03:00
Istvan Csomortani a589753d92 project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl 2019-06-29 06:53:51 +03:00
Istvan Csomortani 43725429ac adi_project: Rename the process adi_project_xilinx to adi_project 2019-06-29 06:53:51 +03:00
AndreiGrozav d894c30c2d Remove deprecated/unused parameters 
adrv9009
adrv9371x
arradio
daq2
daq3
fmcomms2
fmcomms5
 2019-03-30 11:26:11 +02:00
Laszlo Nagy 27f1e4eaed daq3: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Lars-Peter Clausen 1375dcfeaa daq3: Use new pack/unpack infrastructure 
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2018-11-28 11:33:11 +02:00
Istvan Csomortani cff8341c18 daq3/zcu102: Add custom configuration for CPLL 
To support 12.33 Gbps add a custom configuration for the CPLLs.
 2018-10-04 14:37:02 +03:00
Adrian Costina db51fb2829 daq3: ZCU102: Remove Offload FIFO for ADC path. 
DAC FIFO cannot be increased because of timing violations
 2018-08-23 18:06:32 +03:00
Adrian Costina 563710e904 daq3: ZCU102: Fixed system_top to be similar with ZC706. Updated constraints to specify exactly transceiver pin locations 2018-08-23 18:06:32 +03:00
Istvan Csomortani 2293374307 adc|dac_fifo: Maximize the depth of each instance of the internal RAM FIFOs 
The affected projects are:
  - FMCADC2/VC707 - 16Mb
  - FMCADC5/VC707 - 16Mb
  - DAQ2/ZC706  - ADC@1GB and DAC@8Mb
  - DAQ2/KC705  - ADC@4Mb and DAC@4Mb
  - DAQ2/VC707  - ADC@8Mb and DAC@8Mb
  - DAQ2/KCU105 - ADC@4Mb and DAC@4Mb
  - DAQ2/ZCU102 - ADC@8Mb and DAC@8Mb
  - DAQ3/ZC706  - ADC@1GB and DAC@8Mb
  - DAQ3/KCU105 - ADC@4Mb and DAC@4Mb
  - DAQ3/ZCU102 - ADC@8Mb and DAC@8Mb
  - ADRV9371x/KCU105 - DAC@8Mb
  - ADRV9371x/ZCU102 - DAC@16Mb
 2018-08-21 11:44:05 +03:00
AndreiGrozav 4ddbb57749 daq3, fmcomms2/5: Cosmetic update only of the xdc files 2018-08-13 17:45:53 +03:00
AndreiGrozav c8fec4f70e daq3,fmcomms2/5 on zcu102: Fix warnings 
DIFF_TERM is not supported in UltraScale devices.
 2018-08-13 17:45:53 +03:00
Laszlo Nagy 31318cf311 all/system_top.v: drive unused gpio inputs with zero 
The loopback on the unused gpio inputs consumes routing resources
while does not gives any value for the software.

Connect these lines to zero instead.
 2018-08-10 17:00:11 +03:00
Laszlo Nagy fa7c85a9eb all: Drive undriven input signals, complete interface 
- connect unused GPIO inputs to loopback
- connect unconnected inputs to zero
- complete interface for system_wrapper instantiated in all system_top

fixes incomplet portlist WARNING [Synth 8-350]
fixes undriven inputs WARNING [Synth 8-3295]

The change excludes the generated system.v and Xilinx files.
 2018-08-10 17:00:11 +03:00
AndreiGrozav ebae8bf8c1 Remove interrupts from system_top for all xilinx projects 
- remove interrupts from system_top
- for all suported carriers:
	- remove all interrupt bd pins
	- connect to GND all initial unconnected interrupt pins
- update ad_cpu_interrupt procedure to disconnect a interrupt from GND
before connectiong it to another pin.
 2018-08-10 10:10:58 +03:00
Adrian Costina ee60549dfc daq3: ZCU102: Fix AXI_ADXCVR IPs XCVR_TYPE parameter 2018-06-08 13:56:22 +03:00
Lars-Peter Clausen 377247a434 Regenerate project Makefiles using the new shared Makefile includes 
This reduces the amount of boilerplate code that is present in these
Makefiles by a lot.

It also makes it possible to update the Makefile rules in future without
having to re-generate all the Makefiles.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2018-04-11 15:09:54 +03:00
Istvan Csomortani 425e803364 license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
AndreiGrozav 502989c25f jesd_rst_gen:constraints: Remove invalid false path definitions 
The constraint where added to remove timing problems on the reset path.

The constraint paths do not match anymore. The resets are used in a synchronous
way so we don't need the timing exceptions anyway.

Projects affected by this change:
  - daq3
  - adrv9739
  - ad6676evb
  - fmcadc5
  - daq2/kcu105
  - fmcadc2
  - adrv9371x
  - fmcomms11/zc706
  - fmcjesdadc1
 2018-04-11 15:09:54 +03:00
AndreiGrozav dd8d6f90ee zcu102:all_projects: Delete required version tcl variable 
All the ZCU102 projects will use the default tool version.
This setup was a temporary exception for hdl_2017_r1 release.
 2018-04-11 15:09:54 +03:00
Istvan Csomortani a740b6012f Make: Use $(MAKE) for recursive make commands 
This commit should resolve the issue #64.

Recursive make commands should always use the variable MAKE, not the explicit
command name ‘make’.
 2018-03-07 07:40:19 +00:00
AndreiGrozav a23c640180 Require Vivado 2017.2.1 for all zcu102 projects 2017-11-20 15:36:51 +00:00
AndreiGrozav 76cec098d1 daq2, daq3: zcu102: Update constraints 
Differential pins ignored by the tool
 2017-11-15 10:47:01 +02:00
AndreiGrozav 22808fa03c zcu102: Update to rev 1.0 2017-11-08 10:33:12 +02:00
Rejeesh Kutty 9f9955a84c hdlmake.pl updates 2017-07-31 09:02:12 -04:00
AndreiGrozav febdbe8dcb daq3/zcu102: Initial commit 2017-07-31 14:26:23 +03:00