sergiu arpadi
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acbbd4636a
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sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
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2021-01-20 01:02:56 +02:00 |
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Sergiu Arpadi
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d8ab27b2af
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sysid: Remove cstring init string
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2020-09-30 19:12:24 +03:00 |
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Sergiu Arpadi
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3241924d14
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sysid_intel: Added sysid to intel projects
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2020-09-11 15:46:06 +03:00 |
Istvan Csomortani
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f3142a6a7a
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adi_project_intel: set_interconnect_requirment command is deprecated
Use set_domain_assignment to set up the maximum pipeline stages for the
main interconnect.
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2020-08-11 10:14:18 +03:00 |
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Istvan Csomortani
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79b6ba29ce
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all: Rename altera to intel
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2019-06-29 06:53:51 +03:00 |
Laszlo Nagy
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9b048f1a0e
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daq2: update adcfifo/dacfifo
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2019-01-23 14:45:45 +02:00 |
Adrian Costina
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de5a21af80
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daq2: A10GX, added additional interconnect pipelining
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2017-10-23 16:39:58 +01:00 |
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Adrian Costina
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aa6af4e522
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daq2: A10GX, added extra pipelining in the interconnect in order to improve timing
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2017-10-20 13:45:05 +01:00 |
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Adrian Costina
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72d9c1c6f2
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daq2: A10GX, added dac fifo
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2017-10-11 12:52:15 +03:00 |
Rejeesh Kutty
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4a783d523d
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projects/altera* - default & common qsys commands
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2016-12-20 16:27:44 -05:00 |
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Rejeesh Kutty
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2f9ac4a342
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altera- qsys-script does not support most tcl commands
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2016-08-30 11:50:36 -04:00 |
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Rejeesh Kutty
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3516ec28b7
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daq2/a10gx- qsys updates
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2016-06-07 12:28:04 -04:00 |