István Csomortáni
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583bafd17a
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axi_ad7616: Add a new register for IF_TYPE
Add an additional new read only register at 0x03 address for the interface type. This way the software can verify the actual interface mode.
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2016-05-04 16:14:29 +03:00 |
Rejeesh Kutty
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385ed31a45
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make files update
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
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3f5e1e1203
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ad9361- dev_if module name change
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
|
61b531b1c1
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a10soc device update
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
|
89f5d2394e
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altera- clock variations
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
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243d3e6e41
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ad9361- a10soc sdc files
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
|
aa2aa902bf
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ad9361- a10soc updates
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
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f411d29e30
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ad9361- a10soc changes
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
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3563c2212c
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common/altera- removed dcfilt/mul
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
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0260280db1
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common/altera- data path
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
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ed62101308
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common/altera: primitives
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2016-04-29 10:17:35 -04:00 |
Rejeesh Kutty
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779d014750
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ad9361-common alt/xil interface
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2016-04-29 10:17:35 -04:00 |
Istvan Csomortani
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160d54f311
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ad7616_sdz: Some comment rephrase
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2016-04-29 16:41:35 +03:00 |
Istvan Csomortani
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7ec4c00f9f
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axi_ad7616: DMA is always ready
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2016-04-29 16:36:33 +03:00 |
Istvan Csomortani
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427f85959c
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axi_ad7616: Fix the AXI stream interface
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2016-04-29 16:34:34 +03:00 |
Istvan Csomortani
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33199263e1
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axi_ad7616: Delete burst_length register
This was an unnecessary feature of the hdl core.
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2016-04-29 16:28:48 +03:00 |
Rejeesh Kutty
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664ea16a0f
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ccpci- carrier changes
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2016-04-27 16:26:11 -04:00 |
Rejeesh Kutty
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e790e4c3ae
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a10soc- complete qsys
|
2016-04-25 12:56:19 -04:00 |
Rejeesh Kutty
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bfa6fe2a40
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a10soc- updates
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2016-04-25 11:23:16 -04:00 |
Rejeesh Kutty
|
28159aeec9
|
a10soc- updates
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2016-04-25 11:11:46 -04:00 |
Rejeesh Kutty
|
0a3967b886
|
a10soc- updates
|
2016-04-25 10:53:26 -04:00 |
Rejeesh Kutty
|
d36d1263c5
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a10soc- updates
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2016-04-25 10:50:09 -04:00 |
Istvan Csomortani
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d5d7c12f0e
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axi_ad7616: Fix the register map
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2016-04-25 11:36:39 +03:00 |
Istvan Csomortani
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2ccdd426ec
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axi_ad7616: Fix the rd_db_valid generation and do some cosmetic changes.
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2016-04-25 11:28:22 +03:00 |
Istvan Csomortani
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1fd5c0f28b
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ad7616_sdz: Fix IO definitions for the parallel interface.
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2016-04-25 10:56:45 +03:00 |
Istvan Csomortani
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6de356e8fc
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ad7616_sdz: Fix the data width at i_iobuf_adc_cntrl
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2016-04-25 10:55:37 +03:00 |
Istvan Csomortani
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ad227c1af0
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up_axi: Wait more to a valid read acknowledge.
|
2016-04-25 10:34:17 +03:00 |
Rejeesh Kutty
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2a5f31d26b
|
fmcomms2/a10soc- copy
|
2016-04-22 15:15:44 -04:00 |
Rejeesh Kutty
|
82c4f75f13
|
a10soc- a10gx copy
|
2016-04-22 10:39:21 -04:00 |
Rejeesh Kutty
|
7a4a7edfba
|
daq2/a10gx: 10AX115S3F45E2SGE3 version
|
2016-04-20 16:07:41 -04:00 |
Rejeesh Kutty
|
e00236e5fd
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daq2/a10gx: 10AX115S3F45E2SGE3 version
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2016-04-20 16:04:46 -04:00 |
Rejeesh Kutty
|
8b2542b181
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daq2/a10gx: 10AX115S3F45E2SGE3 version
|
2016-04-20 16:01:12 -04:00 |
Rejeesh Kutty
|
e9b199959a
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library/adcfifo- constraints update
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2016-04-20 15:57:25 -04:00 |
AndreiGrozav
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679d471d75
|
Merge branch 'hdl_2016_r1' into dev
hdl_2016_r1 contains IP core upgrades to Vivado 2015.4.2 and hdmi_tx improvements.
|
2016-04-19 18:05:50 +03:00 |
Adrian Costina
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402253d308
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usb_fx3: Updated design to include the GPIF II interface
|
2016-04-19 15:52:30 +03:00 |
Adrian Costina
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d7d8b2cf1c
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axi_usb_fx3: Integrated actual GPIF II interface, with 2 address lines
|
2016-04-19 14:38:26 +03:00 |
Istvan Csomortani
|
8a574cd8ba
|
zc706_system_plddr3.tcl : Add integration process for the AXI_DAC_FIFO
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2016-04-19 11:30:52 +03:00 |
Istvan Csomortani
|
e855ef38f4
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axi_dacfifo: Initial commit
AXI DAC fifo, which use the PL side DDR memory. The minimum data granularity is 1kbyte.
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2016-04-19 11:28:33 +03:00 |
Istvan Csomortani
|
42cd05ab19
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ad_mem_asym: Add support for more ratios.
Supported ratios: 1:1/1:2/1:4/1:8/2:1/4:1/8:1
|
2016-04-19 11:18:30 +03:00 |
AndreiGrozav
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c291f8f107
|
daq1: Updated design to 2015.4
|
2016-04-14 23:36:47 +03:00 |
AndreiGrozav
|
469b4ea5e8
|
fmcadc5: Updated design to 2015.4
|
2016-04-14 23:18:23 +03:00 |
AndreiGrozav
|
62bd057106
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fmcadc5/common: Update common design to 2015.4
|
2016-04-14 23:01:38 +03:00 |
AndreiGrozav
|
6fe41ebb08
|
axi_hdmi_tx: Upgrade hdmi clipping process
-added two registers that control the clipping ranges (0x01a and 0x01b)
-extend clipping process for all output data formats
|
2016-04-12 22:01:07 +03:00 |
Istvan Csomortani
|
69d721526a
|
util_dacfifo: Add constraints file
|
2016-04-12 13:21:50 +03:00 |
Rejeesh Kutty
|
a88ced8136
|
pzsdr1: lvds/cmos updates
|
2016-04-11 16:18:29 -04:00 |
Rejeesh Kutty
|
3006c5a223
|
make updates
|
2016-04-11 16:14:59 -04:00 |
Rejeesh Kutty
|
736bbdd95a
|
pzsdr1- io updates
|
2016-04-11 16:12:21 -04:00 |
Rejeesh Kutty
|
8a5a5082f3
|
pzsdr1- io updates
|
2016-04-11 16:12:09 -04:00 |
Rejeesh Kutty
|
8e689f4594
|
pzsdr1- lvds/cmos constraints
|
2016-04-11 16:00:18 -04:00 |
Rejeesh Kutty
|
7e807d83b1
|
pzsdr1- cmos mode
|
2016-04-11 15:58:29 -04:00 |