pluto_hdl_adi

Author	SHA1	Message	Date
AndreiGrozav	8a306ce96b	axi_ad9162: Updates for ad_dds phase acc wrapper	2018-07-18 18:19:30 +03:00
AndreiGrozav	8dd1687094	axi_ad9162: Update for CORDIC algorithm Add the new files to the IP list Propagate DDS parameters to top file	2018-07-18 18:19:30 +03:00
Lars-Peter Clausen	bd251a5fd5	Remove unused DMA overflow signal from DAC DMA interfaces The DAC DMA will never overflow and unsurprisingly the dac_dovf signal is never used anywhere. It is very unlikely it will ever be used, so remove it. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>	2018-05-02 17:21:20 +02:00
Lars-Peter Clausen	8e90d5db20	axi_ad9162: Infer clock signal for tx_clk port Fixes the following warning: [BD 41-1731] Type mismatch between connected pins: /util_fmcomms11_xcvr/tx_out_clk_0(clk) and /axi_ad9162_core/tx_clk(undef) Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>	2018-04-18 15:16:13 +02:00
Istvan Csomortani	c1bdfca4c3	library: Delete all adi_ip_constraint process call	2017-04-06 12:36:47 +03:00
Istvan Csomortani	873fbfd6d7	library: Update scripts with new constraints Update all IPs tcl scripts with the new constraints files. Refer to commit `335fef0`.	2017-03-30 16:16:02 +03:00
Rejeesh Kutty	c98e2e95dd	ad9162- xcvr updates	2016-09-26 15:21:45 -04:00
Istvan Csomortani	df36902713	lib_refactoring: Fix path of the IO macros	2016-08-08 15:07:19 +03:00
Shrutika Redkar	d931b2ee64	ad9162 core verilog files	2016-06-30 10:24:01 -04:00